llvm::X86ISD Namespace Reference

Enumerations
enum	NodeType {   FIRST_NUMBER = ISD::BUILTIN_OP_END, BSF, BSR, SHLD,   SHRD, FAND, FOR, FXOR,   FSRL, FILD, FILD_FLAG, FP_TO_INT16_IN_MEM,   FP_TO_INT32_IN_MEM, FP_TO_INT64_IN_MEM, FLD, FST,   CALL, TAILCALL, RDTSC_DAG, CMP,   COMI, UCOMI, SETCC, CMOV,   BRCOND, RET_FLAG, REP_STOS, REP_MOVS,   GlobalBaseReg, Wrapper, WrapperRIP, PEXTRB,   PEXTRW, INSERTPS, PINSRB, PINSRW,   FMAX, FMIN, FRSQRT, FRCP,   TLSADDR, THREAD_POINTER, EH_RETURN, TC_RETURN,   LCMPXCHG_DAG, LCMPXCHG8_DAG, ATOMADD64_DAG, ATOMSUB64_DAG,   ATOMOR64_DAG, ATOMXOR64_DAG, ATOMAND64_DAG, ATOMNAND64_DAG,   ATOMSWAP64_DAG, FNSTCW16m, VZEXT_MOVL, VZEXT_LOAD,   VSHL, VSRL, CMPPD, CMPPS,   PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,   PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ }

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Enumeration Type Documentation

enum llvm::X86ISD::NodeType

Enumerator:

FIRST_NUMBER
BSF	BSF - Bit scan forward. BSR - Bit scan reverse.
BSR
SHLD	SHLD, SHRD - Double shift instructions. These correspond to X86::SHLDxx and X86::SHRDxx instructions.
SHRD
FAND	FAND - Bitwise logical AND of floating point values. This corresponds to X86::ANDPS or X86::ANDPD.
FOR	FOR - Bitwise logical OR of floating point values. This corresponds to X86::ORPS or X86::ORPD.
FXOR	FXOR - Bitwise logical XOR of floating point values. This corresponds to X86::XORPS or X86::XORPD.
FSRL	FSRL - Bitwise logical right shift of floating point values. These corresponds to X86::PSRLDQ.
FILD	FILD, FILD_FLAG - This instruction implements SINT_TO_FP with the integer source in memory and FP reg result. This corresponds to the X86::FILD*m instructions. It has three inputs (token chain, address, and source type) and two outputs (FP value and token chain). FILD_FLAG also produces a flag).
FILD_FLAG
FP_TO_INT16_IN_MEM	FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the integer destination in memory and a FP reg source. This corresponds to the X86::FIST*m instructions and the rounding mode change stuff. It has two inputs (token chain and address) and two outputs (int value and token chain).
FP_TO_INT32_IN_MEM
FP_TO_INT64_IN_MEM
FLD	FLD - This instruction implements an extending load to FP stack slots. This corresponds to the X86::FLD32m / X86::FLD64m. It takes a chain operand, ptr to load from, and a ValueType node indicating the type to load to.
FST	FST - This instruction implements a truncating store to FP stack slots. This corresponds to the X86::FST32m / X86::FST64m. It takes a chain operand, value to store, address, and a ValueType to store it as.
CALL	CALL/TAILCALL - These operations represent an abstract X86 call instruction, which includes a bunch of information. In particular the operands of these node are: #0 - The incoming token chain #1 - The callee #2 - The number of arg bytes the caller pushes on the stack. #3 - The number of arg bytes the callee pops off the stack. #4 - The value to pass in AL/AX/EAX (optional) #5 - The value to pass in DL/DX/EDX (optional) The result values of these nodes are: #0 - The outgoing token chain #1 - The first register result value (optional) #2 - The second register result value (optional) The CALL vs TAILCALL distinction boils down to whether the callee is known not to modify the caller's stack frame, as is standard with LLVM.
TAILCALL
RDTSC_DAG	RDTSC_DAG - This operation implements the lowering for readcyclecounter
CMP	X86 compare and logical compare instructions.
COMI
UCOMI
SETCC	X86 SetCC. Operand 1 is condition code, and operand 2 is the flag operand produced by a CMP instruction.
CMOV	X86 conditional moves. Operand 1 and operand 2 are the two values to select from (operand 1 is a R/W operand). Operand 3 is the condition code, and operand 4 is the flag operand produced by a CMP or TEST instruction. It also writes a flag result.
BRCOND	X86 conditional branches. Operand 1 is the chain operand, operand 2 is the block to branch if condition is true, operand 3 is the condition code, and operand 4 is the flag operand produced by a CMP or TEST instruction.
RET_FLAG	Return with a flag operand. Operand 1 is the chain operand, operand 2 is the number of bytes of stack to pop.
REP_STOS	REP_STOS - Repeat fill, corresponds to X86::REP_STOSx.
REP_MOVS	REP_MOVS - Repeat move, corresponds to X86::REP_MOVSx.
GlobalBaseReg	GlobalBaseReg - On Darwin, this node represents the result of the popl at function entry, used for PIC code.
Wrapper	Wrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol, and TargetGlobalAddress.
WrapperRIP	WrapperRIP - Special wrapper used under X86-64 PIC mode for RIP relative displacements.
PEXTRB	PEXTRB - Extract an 8-bit value from a vector and zero extend it to i32, corresponds to X86::PEXTRB.
PEXTRW	PEXTRW - Extract a 16-bit value from a vector and zero extend it to i32, corresponds to X86::PEXTRW.
INSERTPS	INSERTPS - Insert any element of a 4 x float vector into any element of a destination 4 x floatvector.
PINSRB	PINSRB - Insert the lower 8-bits of a 32-bit value to a vector, corresponds to X86::PINSRB.
PINSRW	PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, corresponds to X86::PINSRW.
FMAX	FMAX, FMIN - Floating point max and min.
FMIN
FRSQRT	FRSQRT, FRCP - Floating point reciprocal-sqrt and reciprocal approximation. Note that these typically require refinement in order to obtain suitable precision.
FRCP
TLSADDR
THREAD_POINTER
EH_RETURN
TC_RETURN	TC_RETURN - Tail call return. operand #0 chain operand #1 callee (register or absolute) operand #2 stack adjustment operand #3 optional in flag
LCMPXCHG_DAG
LCMPXCHG8_DAG
ATOMADD64_DAG
ATOMSUB64_DAG
ATOMOR64_DAG
ATOMXOR64_DAG
ATOMAND64_DAG
ATOMNAND64_DAG
ATOMSWAP64_DAG
FNSTCW16m
VZEXT_MOVL
VZEXT_LOAD
VSHL
VSRL
CMPPD
CMPPS
PCMPEQB
PCMPEQW
PCMPEQD
PCMPEQQ
PCMPGTB
PCMPGTW
PCMPGTD
PCMPGTQ

Definition at line 29 of file X86ISelLowering.h.