LLVM API Documentation

llvm::ISD Namespace Reference

Detailed Description

ISD namespace - This namespace contains an enum which represents all of the SelectionDAG node types and value types.

If you add new elements here you should increase OpActionsCapacity in TargetLowering.h by the number of new elements.

Enumeration Type Documentation

enum CondCode

ISD::CondCode enum - These are ordered carefully to make the bitfields below work out, when considering SETFALSE (something that never exists dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal to. If the "N" column is 1, the result of the comparison is undefined if the input is a NAN.
All of these (except for the 'always folded ops') should be handled for floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
Note that these are laid out in a specific order to allow bit-twiddling to transform conditions.
Enumeration values:

SETFALSE

SETOEQ

SETOGT

SETOGE

SETOLT

SETOLE

SETONE

SETO

SETUO

SETUEQ

SETUGT

SETUGE

SETULT

SETULE

SETUNE

SETTRUE

SETFALSE2

SETEQ

SETGT

SETGE

SETLT

SETLE

SETNE

SETTRUE2

SETCC_INVALID

Definition at line 748 of file SelectionDAGNodes.h.

enum LoadExtType

LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
SEXTLOAD loads the integer operand and sign extends it to a larger integer result type. ZEXTLOAD loads the integer operand and zero extends it to a larger integer result type. EXTLOAD is used for three things: floating point extending loads, integer extending loads [the top bits are undefined], and vector extending loads [load into low elt].
Enumeration values:

NON_EXTLOAD

EXTLOAD

SEXTLOAD

ZEXTLOAD

LAST_LOADX_TYPE

Definition at line 726 of file SelectionDAGNodes.h.

enum MemIndexedMode

MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
UNINDEXED "Normal" load / store. The effective address is already computed and is available in the base pointer. The offset operand is always undefined. In addition to producing a chain, an unindexed load produces one value (result of the load); an unindexed store does not produce a value.
PRE_INC Similar to the unindexed mode where the effective address is PRE_DEC the value of the base pointer add / subtract the offset. It considers the computation as being folded into the load / store operation (i.e. the load / store does the address computation as well as performing the memory transaction). The base operand is always undefined. In addition to producing a chain, pre-indexed load produces two values (result of the load and the result of the address computation); a pre-indexed store produces one value (result of the address computation).
POST_INC The effective address is the value of the base pointer. The POST_DEC value of the offset operand is then added to / subtracted from the base after memory transaction. In addition to producing a chain, post-indexed load produces two values (the result of the load and the result of the base +/- offset computation); a post-indexed store produces one value (the the result of the base +/- offset computation).
Enumeration values:

UNINDEXED

PRE_INC

PRE_DEC

POST_INC

POST_DEC

LAST_INDEXED_MODE

Definition at line 705 of file SelectionDAGNodes.h.

enum NodeType

ISD::NodeType enum - This enum defines all of the operators valid in a SelectionDAG.
Enumeration values:

DELETED_NODE

EntryToken

TokenFactor

AssertSext

AssertZext

BasicBlock

VALUETYPE

ARG_FLAGS

CONDCODE

Register

Constant

ConstantFP

GlobalAddress

GlobalTLSAddress

FrameIndex

JumpTable

ConstantPool

ExternalSymbol

GLOBAL_OFFSET_TABLE

FRAMEADDR

RETURNADDR

FRAME_TO_ARGS_OFFSET

EXCEPTIONADDR

EHSELECTION

EH_RETURN

TargetConstant

TargetConstantFP

TargetGlobalAddress

TargetGlobalTLSAddress

TargetFrameIndex

TargetJumpTable

TargetConstantPool

TargetExternalSymbol

INTRINSIC_WO_CHAIN RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with no side effects. The first operand is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node has returns the result of the intrinsic.

INTRINSIC_W_CHAIN RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target intrinsic function with side effects that returns a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node has two results, the result of the intrinsic and an output chain.

INTRINSIC_VOID OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with side effects that does not return a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow.

CopyToReg

CopyFromReg

UNDEF

FORMAL_ARGUMENTS FORMAL_ARGUMENTS(CHAIN, CC#, ISVARARG, FLAG0, ..., FLAGn) - This node represents the formal arguments for a function. CC# is a Constant value indicating the calling convention of the function, and ISVARARG is a flag that indicates whether the function is varargs or not. This node has one result value for each incoming argument, plus one for the output chain. It must be custom legalized. See description of CALL node for FLAG argument contents explanation.

CALL RV1, RV2...RVn, CHAIN = CALL(CHAIN, CC#, ISVARARG, ISTAILCALL, CALLEE, ARG0, FLAG0, ARG1, FLAG1, ... ARGn, FLAGn) This node represents a fully general function call, before the legalizer runs. This has one result value for each argument / flag pair, plus a chain result. It must be custom legalized. Flag argument indicates misc. argument attributes. Currently: Bit 0 - signness Bit 1 - 'inreg' attribute Bit 2 - 'sret' attribute Bit 4 - 'byval' attribute Bit 5 - 'nest' attribute Bit 6-9 - alignment of byval structures Bit 10-26 - size of byval structures Bits 31:27 - argument ABI alignment in the first argument piece and alignment '1' in other argument pieces.

EXTRACT_ELEMENT

BUILD_PAIR

MERGE_VALUES

ADD

SUB

MUL

SDIV

UDIV

SREM

UREM

SMUL_LOHI

UMUL_LOHI

SDIVREM

UDIVREM

CARRY_FALSE

ADDC

SUBC

ADDE

SUBE

FADD

FSUB

FMUL

FDIV

FREM

FCOPYSIGN

FGETSIGN

BUILD_VECTOR BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable, elements. The number of elements is required to be a power of two.

INSERT_VECTOR_ELT INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL. If the type of VAL is larger than the vector element type then VAL is truncated before replacement.

EXTRACT_VECTOR_ELT EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially variable) element number IDX.

CONCAT_VECTORS CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length and element type, this produces a concatenated vector result value, with length equal to the sum of the lengths of the input vectors.

EXTRACT_SUBVECTOR EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the (potentially variable) element number IDX, which must be a multiple of the result vector length.

VECTOR_SHUFFLE VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values (maybe of an illegal datatype) or undef that indicate which value each result element will get. The elements of VEC1/VEC2 are enumerated in order. This is quite similar to the Altivec 'vperm' instruction, except that the indices must be constants and are in terms of the element size of VEC1/VEC2, not in terms of bytes.

SCALAR_TO_VECTOR SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the resultant vector type. The top elements 1 to N-1 of the N-element vector are undefined.

EXTRACT_SUBREG

INSERT_SUBREG

MULHU

MULHS

AND

OR

XOR

SHL

SRA

SRL

ROTL

ROTR

BSWAP

CTTZ

CTLZ

CTPOP

SELECT

SELECT_CC

SETCC

VSETCC

SHL_PARTS

SRA_PARTS

SRL_PARTS

SIGN_EXTEND

ZERO_EXTEND

ANY_EXTEND

TRUNCATE

SINT_TO_FP

UINT_TO_FP

SIGN_EXTEND_INREG

FP_TO_SINT FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.

FP_TO_UINT

FP_ROUND X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the destination VT. TRUNC is a flag, which is always an integer that is zero or one. If TRUNC is 0, this is a normal rounding, if it is 1, this FP_ROUND is known to not change the value of Y.
The TRUNC = 1 case is used in cases where we know that the value will not be modified by the node, because Y is not using any of the extra precision of source type. This allows certain transformations like FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.

FLT_ROUNDS_

FP_ROUND_INREG X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point value. It then promotes it and returns it in a register of the same size. This operation effectively just discards excess precision. The type to round down to is specified by the VT operand, a VTSDNode.

FP_EXTEND X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.

BIT_CONVERT

FNEG

FABS

FSQRT

FSIN

FCOS

FPOWI

FPOW

FCEIL

FTRUNC

FRINT

FNEARBYINT

FFLOOR

LOAD

STORE

DYNAMIC_STACKALLOC

BR

BRIND

BR_JT

BRCOND

BR_CC

RET

INLINEASM

DBG_LABEL

EH_LABEL

DECLARE

STACKSAVE

STACKRESTORE

CALLSEQ_START

CALLSEQ_END

VAARG

VACOPY

VAEND

VASTART

SRCVALUE

MEMOPERAND

PCMARKER

READCYCLECOUNTER

HANDLENODE

DBG_STOPPOINT

DEBUG_LOC

TRAMPOLINE

TRAP

PREFETCH

MEMBARRIER

ATOMIC_CMP_SWAP_8

ATOMIC_CMP_SWAP_16

ATOMIC_CMP_SWAP_32

ATOMIC_CMP_SWAP_64

ATOMIC_SWAP_8

ATOMIC_SWAP_16

ATOMIC_SWAP_32

ATOMIC_SWAP_64

ATOMIC_LOAD_ADD_8

ATOMIC_LOAD_SUB_8

ATOMIC_LOAD_AND_8

ATOMIC_LOAD_OR_8

ATOMIC_LOAD_XOR_8

ATOMIC_LOAD_NAND_8

ATOMIC_LOAD_MIN_8

ATOMIC_LOAD_MAX_8

ATOMIC_LOAD_UMIN_8

ATOMIC_LOAD_UMAX_8

ATOMIC_LOAD_ADD_16

ATOMIC_LOAD_SUB_16

ATOMIC_LOAD_AND_16

ATOMIC_LOAD_OR_16

ATOMIC_LOAD_XOR_16

ATOMIC_LOAD_NAND_16

ATOMIC_LOAD_MIN_16

ATOMIC_LOAD_MAX_16

ATOMIC_LOAD_UMIN_16

ATOMIC_LOAD_UMAX_16

ATOMIC_LOAD_ADD_32

ATOMIC_LOAD_SUB_32

ATOMIC_LOAD_AND_32

ATOMIC_LOAD_OR_32

ATOMIC_LOAD_XOR_32

ATOMIC_LOAD_NAND_32

ATOMIC_LOAD_MIN_32

ATOMIC_LOAD_MAX_32

ATOMIC_LOAD_UMIN_32

ATOMIC_LOAD_UMAX_32

ATOMIC_LOAD_ADD_64

ATOMIC_LOAD_SUB_64

ATOMIC_LOAD_AND_64

ATOMIC_LOAD_OR_64

ATOMIC_LOAD_XOR_64

ATOMIC_LOAD_NAND_64

ATOMIC_LOAD_MIN_64

ATOMIC_LOAD_MAX_64

ATOMIC_LOAD_UMIN_64

ATOMIC_LOAD_UMAX_64

BUILTIN_OP_END

Definition at line 69 of file SelectionDAGNodes.h.

Function Documentation

CondCode getSetCCAndOperation ( CondCode Op1,

CondCode Op2,

bool isInteger

)

getSetCCAndOperation - Return the result of a logical AND between different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This function returns SETCC_INVALID if it is not possible to represent the resultant comparison.

CondCode getSetCCInverse ( CondCode Operation,

bool isInteger

)

getSetCCInverse - Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
Referenced by combineSelectAndUse(), and llvm::TargetLowering::SimplifySetCC().

CondCode getSetCCOrOperation ( CondCode Op1,

CondCode Op2,

bool isInteger

)

getSetCCOrOperation - Return the result of a logical OR between different comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function returns SETCC_INVALID if it is not possible to represent the resultant comparison.

CondCode getSetCCSwappedOperands ( CondCode Operation )

getSetCCSwappedOperands - Return the operation corresponding to (Y op X) when given the operation for (X op Y).

unsigned getUnorderedFlavor ( CondCode Cond ) [inline]

getUnorderedFlavor - This function returns 0 if the condition is always false if an operand is a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if the condition is undefined if the operand is a NaN.
Definition at line 802 of file SelectionDAGNodes.h.
Referenced by llvm::TargetLowering::SimplifySetCC().

bool isBuildVectorAllOnes ( const SDNode * N )

Node predicates.
isBuildVectorAllOnes - Return true if the specified node is a BUILD_VECTOR where all of the elements are ~0 or undef.

bool isBuildVectorAllZeros ( const SDNode * N )

isBuildVectorAllZeros - Return true if the specified node is a BUILD_VECTOR where all of the elements are 0 or undef.
Referenced by isZeroShuffle().

bool isDebugLabel ( const SDNode * N )

isDebugLabel - Return true if the specified node represents a debug label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).

bool isEXTLoad ( const SDNode * N ) [inline]

isEXTLoad - Returns true if the specified node is a EXTLOAD.
Definition at line 2385 of file SelectionDAGNodes.h.
Referenced by isFloatingPointZero().

bool isNON_EXTLoad ( const SDNode * N ) [inline]

isNON_EXTLoad - Returns true if the specified node is a non-extending load.
Definition at line 2378 of file SelectionDAGNodes.h.
Referenced by EltsFromConsecutiveLoads(), isFloatingPointZero(), isScalarLoadToVector(), llvm::PPCTargetLowering::PerformDAGCombine(), ShouldXformToMOVLP(), and translateX86CC().

bool isNON_TRUNCStore ( const SDNode * N ) [inline]

isNON_TRUNCStore - Returns true if the specified node is a non-truncating store.
Definition at line 2421 of file SelectionDAGNodes.h.
Referenced by llvm::PIC16TargetLowering::LowerLOAD(), and IA64DAGToDAGISel::Select().

bool isNormalLoad ( const SDNode * N ) [inline]

isNormalLoad - Returns true if the specified node is a non-extending and unindexed load.
Definition at line 2370 of file SelectionDAGNodes.h.
References llvm::LSBaseSDNode::getAddressingMode(), and llvm::LoadSDNode::getExtensionType().

bool isNormalStore ( const SDNode * N ) [inline]

isNormalStore - Returns true if the specified node is a non-truncating and unindexed store.
Definition at line 2413 of file SelectionDAGNodes.h.

bool isScalarToVector ( const SDNode * N )

isScalarToVector - Return true if the specified node is a ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low element is not an undef.

bool isSEXTLoad ( const SDNode * N ) [inline]

isSEXTLoad - Returns true if the specified node is a SEXTLOAD.
Definition at line 2392 of file SelectionDAGNodes.h.

bool isSignedIntSetCC ( CondCode Code ) [inline]

isSignedIntSetCC - Return true if this is a setcc instruction that performs a signed comparison when used with integer operands.
Definition at line 781 of file SelectionDAGNodes.h.
References SETGE, SETGT, and SETLT.
Referenced by ExtendUsesToFormExtLoad(), and llvm::TargetLowering::SimplifySetCC().

bool isTrueWhenEqual ( CondCode Cond ) [inline]

isTrueWhenEqual - Return true if the specified condition returns true if the two operands to the condition are equal. Note that if one of the two operands is a NaN, this value is meaningless.
Definition at line 794 of file SelectionDAGNodes.h.
Referenced by llvm::ICmpInst::isTrueWhenEqual().

bool isTRUNCStore ( const SDNode * N ) [inline]

isTRUNCStore - Returns true if the specified node is a truncating store.
Definition at line 2427 of file SelectionDAGNodes.h.

bool isUNINDEXEDLoad ( const SDNode * N ) [inline]

isUNINDEXEDLoad - Returns true if the specified node is an unindexed load.
Definition at line 2406 of file SelectionDAGNodes.h.

bool isUNINDEXEDStore ( const SDNode * N ) [inline]

isUNINDEXEDStore - Returns true if the specified node is an unindexed store.
Definition at line 2433 of file SelectionDAGNodes.h.

bool isUnsignedIntSetCC ( CondCode Code ) [inline]

isUnsignedIntSetCC - Return true if this is a setcc instruction that performs an unsigned comparison when used with integer operands.
Definition at line 787 of file SelectionDAGNodes.h.
References SETUGE, SETUGT, and SETULT.
Referenced by PPCDAGToDAGISel::SelectCC().

bool isZEXTLoad ( const SDNode * N ) [inline]

isZEXTLoad - Returns true if the specified node is a ZEXTLOAD.
Definition at line 2399 of file SelectionDAGNodes.h.
Referenced by llvm::SelectionDAG::ComputeMaskedBits().

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Classes
struct	llvm::ISD::ArgFlagsTy
Enumerations
enum	NodeType { DELETED_NODE, EntryToken, TokenFactor, AssertSext, AssertZext, BasicBlock, VALUETYPE, ARG_FLAGS, CONDCODE, Register, Constant, ConstantFP, GlobalAddress, GlobalTLSAddress, FrameIndex, JumpTable, ConstantPool, ExternalSymbol, GLOBAL_OFFSET_TABLE, FRAMEADDR, RETURNADDR, FRAME_TO_ARGS_OFFSET, EXCEPTIONADDR, EHSELECTION, EH_RETURN, TargetConstant, TargetConstantFP, TargetGlobalAddress, TargetGlobalTLSAddress, TargetFrameIndex, TargetJumpTable, TargetConstantPool, TargetExternalSymbol, INTRINSIC_WO_CHAIN, INTRINSIC_W_CHAIN, INTRINSIC_VOID, CopyToReg, CopyFromReg, UNDEF, FORMAL_ARGUMENTS, CALL, EXTRACT_ELEMENT, BUILD_PAIR, MERGE_VALUES, ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, SMUL_LOHI, UMUL_LOHI, SDIVREM, UDIVREM, CARRY_FALSE, ADDC, SUBC, ADDE, SUBE, FADD, FSUB, FMUL, FDIV, FREM, FCOPYSIGN, FGETSIGN, BUILD_VECTOR, INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT, CONCAT_VECTORS, EXTRACT_SUBVECTOR, VECTOR_SHUFFLE, SCALAR_TO_VECTOR, EXTRACT_SUBREG, INSERT_SUBREG, MULHU, MULHS, AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP, CTTZ, CTLZ, CTPOP, SELECT, SELECT_CC, SETCC, VSETCC, SHL_PARTS, SRA_PARTS, SRL_PARTS, SIGN_EXTEND, ZERO_EXTEND, ANY_EXTEND, TRUNCATE, SINT_TO_FP, UINT_TO_FP, SIGN_EXTEND_INREG, FP_TO_SINT, FP_TO_UINT, FP_ROUND, FLT_ROUNDS_, FP_ROUND_INREG, FP_EXTEND, BIT_CONVERT, FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, LOAD, STORE, DYNAMIC_STACKALLOC, BR, BRIND, BR_JT, BRCOND, BR_CC, RET, INLINEASM, DBG_LABEL, EH_LABEL, DECLARE, STACKSAVE, STACKRESTORE, CALLSEQ_START, CALLSEQ_END, VAARG, VACOPY, VAEND, VASTART, SRCVALUE, MEMOPERAND, PCMARKER, READCYCLECOUNTER, HANDLENODE, DBG_STOPPOINT, DEBUG_LOC, TRAMPOLINE, TRAP, PREFETCH, MEMBARRIER, ATOMIC_CMP_SWAP_8, ATOMIC_CMP_SWAP_16, ATOMIC_CMP_SWAP_32, ATOMIC_CMP_SWAP_64, ATOMIC_SWAP_8, ATOMIC_SWAP_16, ATOMIC_SWAP_32, ATOMIC_SWAP_64, ATOMIC_LOAD_ADD_8, ATOMIC_LOAD_SUB_8, ATOMIC_LOAD_AND_8, ATOMIC_LOAD_OR_8, ATOMIC_LOAD_XOR_8, ATOMIC_LOAD_NAND_8, ATOMIC_LOAD_MIN_8, ATOMIC_LOAD_MAX_8, ATOMIC_LOAD_UMIN_8, ATOMIC_LOAD_UMAX_8, ATOMIC_LOAD_ADD_16, ATOMIC_LOAD_SUB_16, ATOMIC_LOAD_AND_16, ATOMIC_LOAD_OR_16, ATOMIC_LOAD_XOR_16, ATOMIC_LOAD_NAND_16, ATOMIC_LOAD_MIN_16, ATOMIC_LOAD_MAX_16, ATOMIC_LOAD_UMIN_16, ATOMIC_LOAD_UMAX_16, ATOMIC_LOAD_ADD_32, ATOMIC_LOAD_SUB_32, ATOMIC_LOAD_AND_32, ATOMIC_LOAD_OR_32, ATOMIC_LOAD_XOR_32, ATOMIC_LOAD_NAND_32, ATOMIC_LOAD_MIN_32, ATOMIC_LOAD_MAX_32, ATOMIC_LOAD_UMIN_32, ATOMIC_LOAD_UMAX_32, ATOMIC_LOAD_ADD_64, ATOMIC_LOAD_SUB_64, ATOMIC_LOAD_AND_64, ATOMIC_LOAD_OR_64, ATOMIC_LOAD_XOR_64, ATOMIC_LOAD_NAND_64, ATOMIC_LOAD_MIN_64, ATOMIC_LOAD_MAX_64, ATOMIC_LOAD_UMIN_64, ATOMIC_LOAD_UMAX_64, BUILTIN_OP_END }
enum	MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC, LAST_INDEXED_MODE }
enum	LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD, LAST_LOADX_TYPE }
enum	CondCode { SETFALSE, SETOEQ, SETOGT, SETOGE, SETOLT, SETOLE, SETONE, SETO, SETUO, SETUEQ, SETUGT, SETUGE, SETULT, SETULE, SETUNE, SETTRUE, SETFALSE2, SETEQ, SETGT, SETGE, SETLT, SETLE, SETNE, SETTRUE2, SETCC_INVALID }
Functions
bool	isBuildVectorAllOnes (const SDNode *N)
	Node predicates.
bool	isBuildVectorAllZeros (const SDNode *N)
bool	isScalarToVector (const SDNode *N)
bool	isDebugLabel (const SDNode *N)
bool	isSignedIntSetCC (CondCode Code)
bool	isUnsignedIntSetCC (CondCode Code)
bool	isTrueWhenEqual (CondCode Cond)
unsigned	getUnorderedFlavor (CondCode Cond)
CondCode	getSetCCInverse (CondCode Operation, bool isInteger)
CondCode	getSetCCSwappedOperands (CondCode Operation)
CondCode	getSetCCOrOperation (CondCode Op1, CondCode Op2, bool isInteger)
CondCode	getSetCCAndOperation (CondCode Op1, CondCode Op2, bool isInteger)
bool	isNormalLoad (const SDNode *N)
bool	isNON_EXTLoad (const SDNode *N)
bool	isEXTLoad (const SDNode *N)
bool	isSEXTLoad (const SDNode *N)
bool	isZEXTLoad (const SDNode *N)
bool	isUNINDEXEDLoad (const SDNode *N)
bool	isNormalStore (const SDNode *N)
bool	isNON_TRUNCStore (const SDNode *N)
bool	isTRUNCStore (const SDNode *N)
bool	isUNINDEXEDStore (const SDNode *N)

llvm::ISD Namespace Reference

Classes

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

Function Documentation