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llvm::ARM_AM Namespace Reference

ARM_AM - ARM Addressing Mode Stuff. More...


Enumerations

enum  ShiftOpc {
  no_shift = 0, asr, lsl, lsr,
  ror, rrx
}
enum  AddrOpc { add = '+', sub = '-' }
enum  AMSubMode {
  bad_am_submode = 0, ia, ib, da,
  db
}

Functions

const char * getShiftOpcStr (ShiftOpc Op)
ShiftOpc getShiftOpcForNode (SDValue N)
const char * getAMSubModeStr (AMSubMode Mode)
const char * getAMSubModeAltStr (AMSubMode Mode, bool isLD)
unsigned rotr32 (unsigned Val, unsigned Amt)
unsigned rotl32 (unsigned Val, unsigned Amt)
unsigned getSORegOpc (ShiftOpc ShOp, unsigned Imm)
unsigned getSORegOffset (unsigned Op)
ShiftOpc getSORegShOp (unsigned Op)
unsigned getSOImmValImm (unsigned Imm)
unsigned getSOImmValRot (unsigned Imm)
unsigned getSOImmValRotate (unsigned Imm)
int getSOImmVal (unsigned Arg)
bool isSOImmTwoPartVal (unsigned V)
unsigned getSOImmTwoPartFirst (unsigned V)
unsigned getSOImmTwoPartSecond (unsigned V)
unsigned getThumbImmValShift (unsigned Imm)
bool isThumbImmShiftedVal (unsigned V)
unsigned getThumbImmNonShiftedVal (unsigned V)
unsigned getAM2Opc (AddrOpc Opc, unsigned Imm12, ShiftOpc SO)
unsigned getAM2Offset (unsigned AM2Opc)
AddrOpc getAM2Op (unsigned AM2Opc)
ShiftOpc getAM2ShiftOpc (unsigned AM2Opc)
unsigned getAM3Opc (AddrOpc Opc, unsigned char Offset)
 getAM3Opc - This function encodes the addrmode3 opc field.
unsigned char getAM3Offset (unsigned AM3Opc)
AddrOpc getAM3Op (unsigned AM3Opc)
AMSubMode getAM4SubMode (unsigned Mode)
unsigned getAM4ModeImm (AMSubMode SubMode, bool WB=false)
bool getAM4WBFlag (unsigned Mode)
unsigned getAM5Opc (AddrOpc Opc, unsigned char Offset)
 getAM5Opc - This function encodes the addrmode5 opc field.
unsigned char getAM5Offset (unsigned AM5Opc)
AddrOpc getAM5Op (unsigned AM5Opc)
unsigned getAM5Opc (AMSubMode SubMode, bool WB, unsigned char Offset)
AMSubMode getAM5SubMode (unsigned AM5Opc)
bool getAM5WBFlag (unsigned AM5Opc)

Detailed Description

ARM_AM - ARM Addressing Mode Stuff.

Enumeration Type Documentation

enum AddrOpc
 

Enumeration values:
add 
sub 

Definition at line 34 of file ARMAddressingModes.h.

Referenced by getAM2Op(), getAM3Op(), and getAM5Op().

enum AMSubMode
 

Enumeration values:
bad_am_submode 
ia 
ib 
da 
db 

Definition at line 63 of file ARMAddressingModes.h.

Referenced by getAM4SubMode(), and getAM5SubMode().

enum ShiftOpc
 

Enumeration values:
no_shift 
asr 
lsl 
lsr 
ror 
rrx 

Definition at line 25 of file ARMAddressingModes.h.

Referenced by getAM2ShiftOpc(), getShiftOpcForNode(), and getSORegShOp().

Function Documentation

unsigned getAM2Offset (  unsigned  AM2Opc  )  [inline, static]
 

Definition at line 279 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), llvm::ARMRegisterInfo::eliminateFrameIndex(), isMatchingDecrement(), isMatchingIncrement(), mergeBaseUpdateLoadStore(), ARMAsmPrinter::printAddrMode2OffsetOperand(), and ARMAsmPrinter::printAddrMode2Operand().

AddrOpc getAM2Op (  unsigned  AM2Opc  )  [inline, static]
 

Definition at line 282 of file ARMAddressingModes.h.

References AddrOpc, and sub.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), llvm::ARMRegisterInfo::eliminateFrameIndex(), ARMAsmPrinter::printAddrMode2OffsetOperand(), and ARMAsmPrinter::printAddrMode2Operand().

unsigned getAM2Opc (  AddrOpc  Opc,
unsigned  Imm12,
ShiftOpc  SO
)  [inline, static]
 

Definition at line 274 of file ARMAddressingModes.h.

Referenced by mergeBaseUpdateLoadStore().

ShiftOpc getAM2ShiftOpc (  unsigned  AM2Opc  )  [inline, static]
 

Definition at line 285 of file ARMAddressingModes.h.

References ShiftOpc.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress().

unsigned char getAM3Offset (  unsigned  AM3Opc  )  [inline, static]
 

Definition at line 308 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), llvm::ARMRegisterInfo::eliminateFrameIndex(), ARMAsmPrinter::printAddrMode3OffsetOperand(), and ARMAsmPrinter::printAddrMode3Operand().

AddrOpc getAM3Op (  unsigned  AM3Opc  )  [inline, static]
 

Definition at line 311 of file ARMAddressingModes.h.

References AddrOpc, and sub.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), llvm::ARMRegisterInfo::eliminateFrameIndex(), ARMAsmPrinter::printAddrMode3OffsetOperand(), and ARMAsmPrinter::printAddrMode3Operand().

unsigned getAM3Opc (  AddrOpc  Opc,
unsigned char  Offset
)  [inline, static]
 

getAM3Opc - This function encodes the addrmode3 opc field.

Definition at line 304 of file ARMAddressingModes.h.

unsigned getAM4ModeImm (  AMSubMode  SubMode,
bool  WB = false
)  [inline, static]
 

Definition at line 336 of file ARMAddressingModes.h.

AMSubMode getAM4SubMode (  unsigned  Mode  )  [inline, static]
 

Definition at line 332 of file ARMAddressingModes.h.

References AMSubMode.

Referenced by mergeBaseUpdateLSMultiple(), and ARMAsmPrinter::printAddrMode4Operand().

bool getAM4WBFlag (  unsigned  Mode  )  [inline, static]
 

Definition at line 340 of file ARMAddressingModes.h.

Referenced by mergeBaseUpdateLSMultiple(), and ARMAsmPrinter::printAddrMode4Operand().

unsigned char getAM5Offset (  unsigned  AM5Opc  )  [inline, static]
 

Definition at line 368 of file ARMAddressingModes.h.

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), getLSMultipleTransferSize(), mergeBaseUpdateLoadStore(), mergeBaseUpdateLSMultiple(), and ARMAsmPrinter::printAddrMode5Operand().

AddrOpc getAM5Op (  unsigned  AM5Opc  )  [inline, static]
 

Definition at line 371 of file ARMAddressingModes.h.

References AddrOpc, and sub.

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), and ARMAsmPrinter::printAddrMode5Operand().

unsigned getAM5Opc (  AMSubMode  SubMode,
bool  WB,
unsigned char  Offset
)  [inline, static]
 

getAM5Opc - This function encodes the addrmode5 opc field for FLDM and FSTM instructions.

Definition at line 377 of file ARMAddressingModes.h.

References db, and ia.

Referenced by mergeBaseUpdateLoadStore().

unsigned getAM5Opc (  AddrOpc  Opc,
unsigned char  Offset
)  [inline, static]
 

getAM5Opc - This function encodes the addrmode5 opc field.

Definition at line 364 of file ARMAddressingModes.h.

AMSubMode getAM5SubMode (  unsigned  AM5Opc  )  [inline, static]
 

Definition at line 383 of file ARMAddressingModes.h.

References AMSubMode.

Referenced by mergeBaseUpdateLSMultiple(), and ARMAsmPrinter::printAddrMode5Operand().

bool getAM5WBFlag (  unsigned  AM5Opc  )  [inline, static]
 

Definition at line 386 of file ARMAddressingModes.h.

Referenced by mergeBaseUpdateLSMultiple(), and ARMAsmPrinter::printAddrMode5Operand().

const char* getAMSubModeAltStr (  AMSubMode  Mode,
bool  isLD
)  [inline, static]
 

Definition at line 81 of file ARMAddressingModes.h.

Referenced by ARMAsmPrinter::printAddrMode4Operand(), and ARMAsmPrinter::printAddrMode5Operand().

const char* getAMSubModeStr (  AMSubMode  Mode  )  [inline, static]
 

Definition at line 71 of file ARMAddressingModes.h.

Referenced by ARMAsmPrinter::printAddrMode4Operand(), and ARMAsmPrinter::printAddrMode5Operand().

ShiftOpc getShiftOpcForNode (  SDValue  N  )  [inline, static]
 

Definition at line 49 of file ARMAddressingModes.h.

References llvm::SDValue::getOpcode(), and ShiftOpc.

Referenced by getIndexedAddressParts(), ARMDAGToDAGISel::SelectAddrMode2(), ARMDAGToDAGISel::SelectAddrMode2Offset(), and ARMDAGToDAGISel::SelectShifterOperandReg().

const char* getShiftOpcStr (  ShiftOpc  Op  )  [inline, static]
 

Definition at line 38 of file ARMAddressingModes.h.

Referenced by ARMAsmPrinter::printAddrMode2OffsetOperand(), ARMAsmPrinter::printAddrMode2Operand(), and ARMAsmPrinter::printSORegOperand().

unsigned getSOImmTwoPartFirst (  unsigned  V  )  [inline, static]
 

getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it.

Definition at line 217 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by ARMAsmPrinter::printSOImm2PartOperand().

unsigned getSOImmTwoPartSecond (  unsigned  V  )  [inline, static]
 

getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it.

Definition at line 223 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by ARMAsmPrinter::printSOImm2PartOperand().

int getSOImmVal (  unsigned  Arg  )  [inline, static]
 

getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it. If not, return -1.

Definition at line 187 of file ARMAddressingModes.h.

References getSOImmValRotate(), rotl32(), and rotr32().

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), llvm::ARMRegisterInfo::eliminateFrameIndex(), emitARMRegPlusImmediate(), isLegalCmpImmediate(), mergeOps(), and ARMDAGToDAGISel::Select().

unsigned getSOImmValImm (  unsigned  Imm  )  [inline, static]
 

getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value.

Definition at line 131 of file ARMAddressingModes.h.

Referenced by printSOImm().

unsigned getSOImmValRot (  unsigned  Imm  )  [inline, static]
 

getSOImmValRotate - Given an encoded imm field for the reg/imm form, return the rotate amount.

Definition at line 136 of file ARMAddressingModes.h.

Referenced by printSOImm().

unsigned getSOImmValRotate (  unsigned  Imm  )  [inline, static]
 

getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use. If this immediate value cannot be handled with a single shifter-op, determine a good rotate amount that will take a maximal chunk of bits out of the immediate.

Definition at line 144 of file ARMAddressingModes.h.

References llvm::CountTrailingZeros_32(), and rotr32().

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), emitARMRegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), and isSOImmTwoPartVal().

unsigned getSORegOffset (  unsigned  Op  )  [inline, static]
 

Definition at line 122 of file ARMAddressingModes.h.

Referenced by ARMAsmPrinter::printSORegOperand().

unsigned getSORegOpc (  ShiftOpc  ShOp,
unsigned  Imm
)  [inline, static]
 

Definition at line 119 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstrInfo::convertToThreeAddress(), and ARMDAGToDAGISel::Select().

ShiftOpc getSORegShOp (  unsigned  Op  )  [inline, static]
 

Definition at line 125 of file ARMAddressingModes.h.

References ShiftOpc.

unsigned getThumbImmNonShiftedVal (  unsigned  V  )  [inline, static]
 

getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value.

Definition at line 253 of file ARMAddressingModes.h.

References getThumbImmValShift().

unsigned getThumbImmValShift (  unsigned  Imm  )  [inline, static]
 

getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift. Returns the shift amount to use.

Definition at line 234 of file ARMAddressingModes.h.

References llvm::CountTrailingZeros_32().

Referenced by getThumbImmNonShiftedVal(), and isThumbImmShiftedVal().

bool isSOImmTwoPartVal (  unsigned  V  )  [inline, static]
 

isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's.

Definition at line 204 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by ARMDAGToDAGISel::Select().

bool isThumbImmShiftedVal (  unsigned  V  )  [inline, static]
 

isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate.

Definition at line 245 of file ARMAddressingModes.h.

References getThumbImmValShift().

Referenced by ARMDAGToDAGISel::Select().

unsigned rotl32 (  unsigned  Val,
unsigned  Amt
)  [inline, static]
 

rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.

Definition at line 100 of file ARMAddressingModes.h.

Referenced by getSOImmVal().

unsigned rotr32 (  unsigned  Val,
unsigned  Amt
)  [inline, static]
 

rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.

Definition at line 93 of file ARMAddressingModes.h.

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), emitARMRegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), getSOImmValRotate(), isSOImmTwoPartVal(), and printSOImm().

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