llvm::ScheduleDAGSDNodes Class Reference
#include <ScheduleDAGSDNodes.h>
Public Member Functions | |
| ScheduleDAGSDNodes (SelectionDAG *dag, MachineBasicBlock *bb, const TargetMachine &tm) | |
| virtual | ~ScheduleDAGSDNodes () |
| SUnit * | NewSUnit (SDNode *N) |
| SUnit * | Clone (SUnit *N) |
| virtual SelectionDAG * | getDAG () |
| virtual void | BuildSchedGraph () |
| virtual void | ComputeLatency (SUnit *SU) |
| void | EmitNode (SDNode *Node, bool IsClone, DenseMap< SDValue, unsigned > &VRBaseMap) |
| virtual MachineBasicBlock * | EmitSchedule () |
| EmitSchedule - Emit the machine code in scheduled order. | |
| virtual void | Schedule ()=0 |
| virtual void | dumpNode (const SUnit *SU) const |
| virtual std::string | getGraphNodeLabel (const SUnit *SU) const |
| virtual void | getCustomGraphFeatures (GraphWriter< ScheduleDAG * > &GW) const |
Static Public Member Functions | |
| static bool | isPassiveNode (SDNode *Node) |
| static unsigned | CountResults (SDNode *Node) |
| static unsigned | CountOperands (SDNode *Node) |
| static unsigned | ComputeMemOperandsEnd (SDNode *Node) |
Detailed Description
ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.Edges between SUnits are initially based on edges in the SelectionDAG, and additional edges can be added by the schedulers as heuristics. SDNodes such as Constants, Registers, and a few others that are not interesting to schedulers are not allocated SUnits.
SDNodes with MVT::Flag operands are grouped along with the flagged nodes into a single SUnit so that they are scheduled together.
SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output edges. Physical register dependence information is not carried in the DAG and must be handled explicitly by schedulers.
Definition at line 75 of file ScheduleDAGSDNodes.h.
Constructor & Destructor Documentation
| ScheduleDAGSDNodes::ScheduleDAGSDNodes | ( | SelectionDAG * | dag, | |
| MachineBasicBlock * | bb, | |||
| const TargetMachine & | tm | |||
| ) |
Definition at line 25 of file ScheduleDAGSDNodes.cpp.
| virtual llvm::ScheduleDAGSDNodes::~ScheduleDAGSDNodes | ( | ) | [inline, virtual] |
Definition at line 80 of file ScheduleDAGSDNodes.h.
Member Function Documentation
| static bool llvm::ScheduleDAGSDNodes::isPassiveNode | ( | SDNode * | Node | ) | [inline, static] |
isPassiveNode - Return true if the node is a non-scheduled leaf.
Definition at line 84 of file ScheduleDAGSDNodes.h.
References llvm::ISD::EntryToken, and llvm::SDNode::getOpcode().
NewSUnit - Creates a new SUnit and return a ptr to it.
Definition at line 101 of file ScheduleDAGSDNodes.h.
References llvm::ScheduleDAG::SUnits.
Referenced by Clone().
Clone - Creates a clone of the specified SUnit. It does not copy the predecessors / successors info nor the temporary scheduling states.
Definition at line 30 of file ScheduleDAGSDNodes.cpp.
References llvm::SUnit::getNode(), llvm::SUnit::hasPhysRegDefs, llvm::SUnit::isCommutable, llvm::SUnit::isTwoAddress, llvm::SUnit::Latency, NewSUnit(), and llvm::SUnit::OrigNode.
| virtual SelectionDAG* llvm::ScheduleDAGSDNodes::getDAG | ( | ) | [inline, virtual] |
| void ScheduleDAGSDNodes::BuildSchedGraph | ( | ) | [virtual] |
BuildSchedGraph - Build the SUnit graph from the selection dag that we are input. This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents flagged together nodes with a single SUnit.
BuildSchedGraph - Build the SUnit graph from the selection dag that we are input. This SUnit graph is similar to the SelectionDAG, but excludes nodes that aren't interesting to scheduling, and represents flagged together nodes with a single SUnit.
Implements llvm::ScheduleDAG.
Definition at line 202 of file ScheduleDAGSDNodes.cpp.
| void ScheduleDAGSDNodes::ComputeLatency | ( | SUnit * | SU | ) | [virtual] |
ComputeLatency - Compute node latency.
Implements llvm::ScheduleDAG.
Definition at line 209 of file ScheduleDAGSDNodes.cpp.
References llvm::TargetInstrInfo::get(), llvm::SDNode::getFlaggedNode(), llvm::TargetMachine::getInstrItineraryData(), llvm::InstrItineraryData::getLatency(), llvm::SDNode::getMachineOpcode(), llvm::SUnit::getNode(), llvm::SDNode::isMachineOpcode(), llvm::SUnit::Latency, llvm::ScheduleDAG::TII, and llvm::ScheduleDAG::TM.
CountResults - The results of target nodes have register or immediate operands first, then an optional chain, and optional flag operands (which do not go into the machine instrs.)
CountResults - The results of target nodes have register or immediate operands first, then an optional chain, and optional flag operands (which do not go into the resulting MachineInstr).
Definition at line 227 of file ScheduleDAGSDNodes.cpp.
References llvm::MVT::Flag, llvm::SDNode::getNumValues(), llvm::SDNode::getValueType(), and llvm::MVT::Other.
Referenced by EmitNode().
CountOperands - The inputs to target nodes have any actual inputs first, followed by special operands that describe memory references, then an optional chain operand, then flag operands. Compute the number of actual operands that will go into the resulting MachineInstr.
CountOperands - The inputs to target nodes have any actual inputs first, followed by special operands that describe memory references, then an optional chain operand, then an optional flag operand. Compute the number of actual operands that will go into the resulting MachineInstr.
Definition at line 240 of file ScheduleDAGSDNodes.cpp.
References ComputeMemOperandsEnd(), llvm::SDValue::getNode(), and llvm::SDNode::getOperand().
Referenced by EmitNode().
ComputeMemOperandsEnd - Find the index one past the last MemOperandSDNode operand
ComputeMemOperandsEnd - Find the index one past the last MemOperandSDNode operand
Definition at line 249 of file ScheduleDAGSDNodes.cpp.
References llvm::MVT::Flag, llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), llvm::SDValue::getValueType(), and llvm::MVT::Other.
Referenced by CountOperands(), and EmitNode().
| void ScheduleDAGSDNodes::EmitNode | ( | SDNode * | Node, | |
| bool | IsClone, | |||
| DenseMap< SDValue, unsigned > & | VRBaseMap | |||
| ) |
EmitNode - Generate machine code for an node and needed dependencies. VRBaseMap contains, for each already emitted node, the first virtual register number for the results of the node.
EmitNode - Generate machine code for an node and needed dependencies.
Definition at line 453 of file ScheduleDAGSDNodesEmit.cpp.
References llvm::ScheduleDAG::AddMemOperand(), llvm::MachineInstr::addOperand(), llvm::ScheduleDAG::BB, llvm::BuildMI(), ComputeMemOperandsEnd(), llvm::ISD::CopyFromReg, llvm::TargetInstrInfo::copyRegToReg(), llvm::ISD::CopyToReg, CountOperands(), CountResults(), llvm::MachineOperand::CreateES(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), llvm::ScheduleDAG::DAG, llvm::SDNode::dump(), llvm::TargetLowering::EmitInstrWithCustomInserter(), llvm::MachineBasicBlock::end(), llvm::ISD::EntryToken, llvm::TargetInstrInfo::EXTRACT_SUBREG, llvm::MVT::Flag, llvm::TargetInstrInfo::get(), llvm::TargetInstrDesc::getImplicitDefs(), llvm::SDNode::getMachineOpcode(), llvm::TargetInstrDesc::getNumDefs(), llvm::SDNode::getNumOperands(), llvm::TargetInstrDesc::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::TargetRegisterInfo::getPhysicalRegisterRegClass(), llvm::MachineRegisterInfo::getRegClass(), llvm::SDValue::getValueType(), llvm::SDNode::hasAnyUseOfValue(), llvm::TargetInstrInfo::IMPLICIT_DEF, llvm::TargetInstrInfo::INLINEASM, llvm::ISD::INLINEASM, llvm::TargetInstrInfo::INSERT_SUBREG, llvm::SDNode::isMachineOpcode(), llvm::TargetInstrDesc::isVariadic(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::ScheduleDAG::MF, llvm::ScheduleDAG::MRI, llvm::MachineBasicBlock::push_back(), R, llvm::TargetInstrInfo::SUBREG_TO_REG, llvm::ScheduleDAG::TII, llvm::ScheduleDAG::TLI, llvm::ISD::TokenFactor, llvm::ScheduleDAG::TRI, and llvm::TargetInstrDesc::usesCustomDAGSchedInsertionHook().
Referenced by EmitSchedule().
| MachineBasicBlock * ScheduleDAGSDNodes::EmitSchedule | ( | ) | [virtual] |
EmitSchedule - Emit the machine code in scheduled order.
Implements llvm::ScheduleDAG.
Definition at line 617 of file ScheduleDAGSDNodesEmit.cpp.
References llvm::SmallVectorImpl< T >::back(), llvm::ScheduleDAG::BB, llvm::ScheduleDAG::EmitCrossRCCopy(), EmitNode(), llvm::ScheduleDAG::EmitNoop(), llvm::SmallVectorImpl< T >::empty(), llvm::SDNode::getFlaggedNode(), llvm::SUnit::getNode(), llvm::SUnit::OrigNode, llvm::SmallVectorImpl< T >::pop_back(), llvm::SmallVectorImpl< T >::push_back(), and llvm::ScheduleDAG::Sequence.
| virtual void llvm::ScheduleDAGSDNodes::Schedule | ( | ) | [pure virtual] |
Schedule - Order nodes according to selected style, filling in the Sequence member.
Implements llvm::ScheduleDAG.
| void ScheduleDAGSDNodes::dumpNode | ( | const SUnit * | SU | ) | const [virtual] |
Implements llvm::ScheduleDAG.
Definition at line 259 of file ScheduleDAGSDNodes.cpp.
References llvm::SmallVectorImpl< T >::back(), llvm::cerr(), llvm::ScheduleDAG::DAG, llvm::SDNode::dump(), llvm::SmallVectorImpl< T >::empty(), llvm::SDNode::getFlaggedNode(), llvm::SUnit::getNode(), llvm::SmallVectorImpl< T >::pop_back(), and llvm::SmallVectorImpl< T >::push_back().
| std::string ScheduleDAGSDNodes::getGraphNodeLabel | ( | const SUnit * | SU | ) | const [virtual] |
getGraphNodeLabel - Return a label for an SUnit node in a visualization of the ScheduleDAG.
Implements llvm::ScheduleDAG.
Definition at line 384 of file SelectionDAGPrinter.cpp.
References llvm::SmallVectorImpl< T >::back(), llvm::ScheduleDAG::DAG, llvm::SmallVectorImpl< T >::empty(), llvm::SDNode::getFlaggedNode(), llvm::SUnit::getNode(), llvm::SUnit::NodeNum, llvm::SmallVectorImpl< T >::pop_back(), llvm::SmallVectorImpl< T >::push_back(), and llvm::raw_string_ostream::str().
| void ScheduleDAGSDNodes::getCustomGraphFeatures | ( | GraphWriter< ScheduleDAG * > & | GW | ) | const [virtual] |
The documentation for this class was generated from the following files:
1.5.6