llvm::SDValue Class Reference
#include <SelectionDAGNodes.h>
Public Member Functions | |
| SDValue () | |
| SDValue (SDNode *node, unsigned resno) | |
| unsigned | getResNo () const |
| get the index which selects a specific result in the SDNode | |
| SDNode * | getNode () const |
| get the SDNode which holds the desired result | |
| void | setNode (SDNode *N) |
| set the SDNode | |
| bool | operator== (const SDValue &O) const |
| bool | operator!= (const SDValue &O) const |
| bool | operator< (const SDValue &O) const |
| SDValue | getValue (unsigned R) const |
| bool | isOperandOf (SDNode *N) const |
| MVT | getValueType () const |
| unsigned | getValueSizeInBits () const |
| unsigned | getOpcode () const |
| unsigned | getNumOperands () const |
| const SDValue & | getOperand (unsigned i) const |
| uint64_t | getConstantOperandVal (unsigned i) const |
| bool | isTargetOpcode () const |
| bool | isMachineOpcode () const |
| unsigned | getMachineOpcode () const |
| bool | reachesChainWithoutSideEffects (SDValue Dest, unsigned Depth=2) const |
| bool | use_empty () const |
| bool | hasOneUse () const |
Detailed Description
SDValue - Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation. Many nodes return multiple values, from loads (which define a token and a return value) to ADDC (which returns a result and a carry value), to calls (which may return an arbitrary number of values).As such, each use of a SelectionDAG computation must indicate the node that computes it as well as which return value to use from that node. This pair of information is represented with the SDValue value type.
Definition at line 853 of file SelectionDAGNodes.h.
Constructor & Destructor Documentation
| llvm::SDValue::SDValue | ( | ) | [inline] |
Definition at line 858 of file SelectionDAGNodes.h.
Member Function Documentation
| unsigned llvm::SDValue::getResNo | ( | ) | const [inline] |
get the index which selects a specific result in the SDNode
Definition at line 861 of file SelectionDAGNodes.h.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), AddNodeIDOperands(), CheckForPhysRegDependency(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SelectionDAG::ComputeNumSignBits(), ExtendUsesToFormExtLoad(), findFlagUse(), getBuildPairElt(), llvm::RegsForValue::getCopyToRegs(), llvm::DenseMapInfo< SDValue >::getHashValue(), IsPossiblyOverwrittenArgumentOfTailCall(), LowerCALL(), llvm::PIC16TargetLowering::LowerFORMAL_ARGUMENTS(), llvm::SelectionDAG::ReplaceAllUsesWith(), and llvm::SelectionDAG::UpdateNodeOperands().
| SDNode* llvm::SDValue::getNode | ( | ) | const [inline] |
get the SDNode which holds the desired result
Definition at line 864 of file SelectionDAGNodes.h.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), AddNodeIDOperands(), ArgsAreStructReturn(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), CheckDAGForTailCallsAndFixThem(), ChooseConstraint(), combineShlAddConstant(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::ScheduleDAGSDNodes::CountOperands(), EltsFromConsecutiveLoads(), ExtendUsesToFormExtLoad(), FindCallStartFromCall(), FindCallStartFromCallEnd(), findFlagUse(), findNonImmUse(), findPredecessor(), llvm::SelectionDAG::FoldSetCC(), llvm::PPC::get_VSPLTI_elt(), getARMCmp(), getBuildPairElt(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), llvm::SDNode::getFlaggedNode(), llvm::DenseMapInfo< SDValue >::getHashValue(), llvm::SelectionDAG::getMemcpy(), llvm::SelectionDAG::getMemmove(), llvm::MemSDNode::getMemOperand(), llvm::SelectionDAG::getMemset(), llvm::SelectionDAG::getNode(), getNumOfConsecutiveZeros(), llvm::ARMTargetLowering::getPreIndexedAddressParts(), llvm::SelectionDAG::getShuffleScalarElt(), llvm::simplify_type< const SDValue >::getSimplifiedValue(), llvm::simplify_type< SDValue >::getSimplifiedValue(), llvm::SelectionDAG::getTargetNode(), llvm::SelectionDAGLowering::getValue(), getVecImm(), getVZextMovL(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), llvm::TargetLowering::isConsecutiveLoad(), isFloatingPointZero(), llvm::TargetLowering::isGAPlusOffset(), isInt32Immediate(), isIntS16Immediate(), isOneUseSetCC(), isOpcWithIntImmediate(), isRMWLoad(), isScalarLoadToVector(), llvm::X86TargetLowering::isShuffleMaskLegal(), isSplatMask(), isZeroShuffle(), llvm::TargetLowering::LowerArguments(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), LowerBUILD_VECTOR(), LowerByteImmed(), LowerCALL(), llvm::IA64TargetLowering::LowerCallTo(), LowerConstant(), LowerConstantFP(), llvm::PIC16TargetLowering::LowerFORMAL_ARGUMENTS(), LowerFORMAL_ARGUMENTS(), llvm::XCoreTargetLowering::LowerOperation(), llvm::SPUTargetLowering::LowerOperation(), llvm::PIC16TargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::AlphaTargetLowering::LowerOperation(), LowerRET(), LowerSCALAR_TO_VECTOR(), LowerSTORE(), LowerVAARG(), LowerVECTOR_SHUFFLEv8i16(), MoveBelowCallSeqStart(), MoveBelowTokenFactor(), PerformBuildVectorCombine(), llvm::SPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformShuffleCombine(), PerformSTORECombine(), llvm::SDNode::print(), PromoteSplat(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::PIC16TargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::AlphaTargetLowering::ReplaceNodeResults(), llvm::DAGTypeLegalizer::run(), llvm::SDNode::SDNode(), llvm::SelectionDAG::setRoot(), llvm::SelectionDAGLowering::setValue(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), TranslateX86CC(), and llvm::SelectionDAG::UpdateNodeOperands().
| void llvm::SDValue::setNode | ( | SDNode * | N | ) | [inline] |
| bool llvm::SDValue::operator== | ( | const SDValue & | O | ) | const [inline] |
Definition at line 869 of file SelectionDAGNodes.h.
Referenced by llvm::SDNodeIterator::operator!=(), and operator!=().
| bool llvm::SDValue::operator!= | ( | const SDValue & | O | ) | const [inline] |
| bool llvm::SDValue::operator< | ( | const SDValue & | O | ) | const [inline] |
Definition at line 879 of file SelectionDAGNodes.h.
References SDValue().
Referenced by CheckDAGForTailCallsAndFixThem(), ExpandBIT_CONVERT(), llvm::PIC16TargetLowering::ExpandShift(), ExpandSRx(), ExpandUnalignedLoad(), ExpandUnalignedStore(), llvm::RegsForValue::getCopyFromRegs(), llvm::RegsForValue::getCopyToRegs(), getMemmoveLoadsAndStores(), llvm::TargetLowering::LowerArguments(), llvm::IA64TargetLowering::LowerArguments(), LowerBR_CC(), LowerCALL(), llvm::TargetLowering::LowerCallTo(), llvm::IA64TargetLowering::LowerCallTo(), llvm::AlphaTargetLowering::LowerCallTo(), LowerDYNAMIC_STACKALLOC(), LowerFORMAL_ARGUMENT(), LowerFORMAL_ARGUMENTS(), LowerLOAD(), llvm::IA64TargetLowering::LowerOperation(), llvm::AlphaTargetLowering::LowerOperation(), LowerRET(), LowerSELECT_CC(), LowerSTORE(), LowerToTLSGeneralDynamicModel32(), LowerToTLSGeneralDynamicModel64(), LowerVAARG(), MoveBelowTokenFactor(), PerformBuildVectorCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformSTORECombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), and llvm::SelectionDAGLowering::visitJumpTable().
| bool SDValue::isOperandOf | ( | SDNode * | N | ) | const |
isOperand - Return true if this node is an operand of N.
Definition at line 4894 of file SelectionDAG.cpp.
References llvm::SDNode::getNumOperands(), and llvm::SDNode::getOperand().
| MVT llvm::SDValue::getValueType | ( | ) | const [inline] |
getValueType - Return the ValueType of the referenced return value.
Definition at line 1426 of file SelectionDAGNodes.h.
References Node.
Referenced by llvm::CCState::AnalyzeCallOperands(), llvm::CCState::AnalyzeReturn(), BuildIntrinsicOp(), CalculateParameterAndLinkageAreaSize(), CalculateStackSlotSize(), CalculateTailCallArgDest(), CanonicalizeMovddup(), CheckDAGForTailCallsAndFixThem(), combineSelectAndUse(), combineShlAddConstant(), CommuteVectorShuffle(), CommuteVectorShuffleMask(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SPUTargetLowering::computeMaskedBitsForTargetNode(), llvm::ScheduleDAGSDNodes::ComputeMemOperandsEnd(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::SPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::ScheduleDAGSDNodes::EmitNode(), ExpandFCOPYSIGNToBitwiseOps(), llvm::PIC16TargetLowering::ExpandStore(), ExpandUnalignedLoad(), ExpandUnalignedStore(), ExtendUsesToFormExtLoad(), FindCallStartFromCall(), FindCallStartFromCallEnd(), llvm::SelectionDAG::FoldSetCC(), GeneratePerfectShuffle(), llvm::SelectionDAG::getAtomic(), GetConstantBuildVectorBits(), getCopyFromParts(), getCopyToParts(), llvm::SelectionDAG::getCopyToReg(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), llvm::SelectionDAG::getExtLoad(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), getInputChainForNode(), llvm::SelectionDAG::getLoad(), getMemBasePlusOffset(), llvm::SelectionDAG::getMemset(), llvm::SelectionDAG::getMergeValues(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), llvm::CallSDNode::getRetValType(), llvm::SelectionDAG::getSelectCC(), llvm::SelectionDAG::getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTruncStore(), getValueSizeInBits(), getVZextMovL(), llvm::SelectionDAG::getZeroExtendInReg(), isNegatibleForFree(), isVectorLoad(), llvm::PIC16TargetLowering::LowerADDC(), llvm::PIC16TargetLowering::LowerADDE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::PIC16TargetLowering::LowerBinOp(), LowerBR_CC(), LowerBUILD_VECTOR(), LowerByteImmed(), LowerCALL(), llvm::IA64TargetLowering::LowerCallTo(), LowerConstant(), LowerConstantFP(), LowerConstantPool(), LowerCTPOP(), LowerEXTRACT_VECTOR_ELT(), LowerFCOPYSIGN(), LowerFORMAL_ARGUMENT(), LowerFORMAL_ARGUMENTS(), LowerFP_TO_SINT(), LowerGlobalAddress(), LowerI64Math(), LowerI8Math(), LowerINSERT_VECTOR_ELT(), LowerINT_TO_FP(), LowerJumpTable(), LowerLOAD(), llvm::SPUTargetLowering::LowerOperation(), llvm::IA64TargetLowering::LowerOperation(), llvm::AlphaTargetLowering::LowerOperation(), LowerRET(), LowerSCALAR_TO_VECTOR(), LowerSELECT_CC(), LowerSINT_TO_FP(), llvm::PIC16TargetLowering::LowerSUBC(), llvm::PIC16TargetLowering::LowerSUBE(), LowerTRUNCATE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_4wide(), NormalizeMask(), llvm::SPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformSTORECombine(), PromoteSplat(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::DAGTypeLegalizer::run(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImmShift(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAG::setRoot(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), TranslateX86CC(), llvm::SelectionDAGLowering::visitBitTestCase(), llvm::SelectionDAGLowering::visitBitTestHeader(), llvm::SelectionDAGLowering::visitJumpTableHeader(), and llvm::SelectionDAGLowering::visitSwitchCase().
| unsigned llvm::SDValue::getValueSizeInBits | ( | ) | const [inline] |
getValueSizeInBits - Returns the size of the value in bits.
Definition at line 892 of file SelectionDAGNodes.h.
References llvm::MVT::getSizeInBits(), and getValueType().
Referenced by llvm::SelectionDAGISel::CheckAndMask(), llvm::SelectionDAGISel::CheckOrMask(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImmShift(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::SelectionDAG::SignBitIsZero(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifySetCC().
| unsigned llvm::SDValue::getOpcode | ( | ) | const [inline] |
Definition at line 1423 of file SelectionDAGNodes.h.
References Node.
Referenced by CheckDAGForTailCallsAndFixThem(), combineSelectAndUse(), combineShlAddConstant(), CommuteVectorShuffle(), CommuteVectorShuffleMask(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::X86TargetLowering::computeMaskedBitsForTargetNode(), llvm::TargetLowering::computeMaskedBitsForTargetNode(), llvm::SPUTargetLowering::computeMaskedBitsForTargetNode(), llvm::SparcTargetLowering::computeMaskedBitsForTargetNode(), llvm::PPCTargetLowering::computeMaskedBitsForTargetNode(), llvm::ARMTargetLowering::computeMaskedBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::SPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::SelectionDAGLowering::CopyValueToVirtualRegister(), EltsFromConsecutiveLoads(), llvm::PIC16TargetLowering::ExpandShift(), llvm::PIC16TargetLowering::ExpandStore(), FindBaseOffset(), llvm::PPC::get_VSPLTI_elt(), llvm::MemSDNode::getBasePtr(), getBuildPairElt(), GetConstantBuildVectorBits(), llvm::SelectionDAGLowering::getControlRoot(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), llvm::SelectionDAG::getLoad(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOfConsecutiveZeros(), llvm::LSBaseSDNode::getOffset(), llvm::TargetLowering::GetPossiblePreceedingTailCall(), llvm::ARM_AM::getShiftOpcForNode(), llvm::X86::getShufflePSHUFHWImmediate(), llvm::X86::getShufflePSHUFLWImmediate(), llvm::SelectionDAG::getShuffleScalarElt(), llvm::X86::getShuffleSHUFImmediate(), getVecImm(), getVZextMovL(), InferAlignment(), isAndOrOfSetCCs(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), llvm::AtomicSDNode::isCompareAndSwap(), llvm::TargetLowering::isConsecutiveLoad(), isConstantOrUndef(), isFloatingPointZero(), isHighLow(), isMemSrcFromString(), llvm::X86::isMOVSHDUPMask(), llvm::X86::isMOVSLDUPMask(), isNegatibleForFree(), IsPossiblyOverwrittenArgumentOfTailCall(), llvm::X86::isPSHUFDMask(), isPSHUFHW_PSHUFLWMask(), llvm::X86::isPSHUFHWMask(), isRMWLoad(), llvm::ISD::isScalarToVector(), isSetCCEquivalent(), isSplatMask(), llvm::PPC::isSplatShuffleMask(), isUndefOrEqual(), isUndefOrInRange(), isUndefShuffle(), isVectorLoad(), llvm::PPC::isVSLDOIShuffleMask(), isZeroShuffle(), LookThroughSetCC(), llvm::PIC16TargetLowering::LowerADDC(), llvm::PIC16TargetLowering::LowerADDE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::PIC16TargetLowering::LowerBinOp(), LowerFP_TO_INT(), LowerI8Math(), LowerINT_TO_FP(), LowerLOAD(), llvm::XCoreTargetLowering::LowerOperation(), llvm::X86TargetLowering::LowerOperation(), llvm::SPUTargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerOperation(), llvm::PPCTargetLowering::LowerOperation(), llvm::PIC16TargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperation(), llvm::IA64TargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::AlphaTargetLowering::LowerOperation(), LowerSTORE(), llvm::PIC16TargetLowering::LowerSUBC(), llvm::PIC16TargetLowering::LowerSUBE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_4wide(), LowerVECTOR_SHUFFLEv8i16(), llvm::LSBaseSDNode::LSBaseSDNode(), MatchRotateHalf(), MeetsMaxMemopRequirement(), NormalizeMask(), llvm::SPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformFMRRDCombine(), PerformSELECTCombine(), llvm::SDNode::print(), reachesChainWithoutSideEffects(), RewriteAsNarrowerShuffle(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImmShift(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), SequentialMask(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and llvm::SelectionDAGLowering::visitSwitchCase().
| unsigned llvm::SDValue::getNumOperands | ( | ) | const [inline] |
Definition at line 1429 of file SelectionDAGNodes.h.
References Node.
Referenced by llvm::TargetLowering::CheckTailCallReturnConstraints(), CommuteVectorShuffle(), CommuteVectorShuffleMask(), llvm::SelectionDAG::getNode(), llvm::CallSDNode::getNumArgs(), llvm::TargetLowering::GetPossiblePreceedingTailCall(), llvm::SelectionDAG::getShuffleScalarElt(), isUndefShuffle(), isVectorShift(), isZeroShuffle(), llvm::PIC16TargetLowering::LowerFORMAL_ARGUMENTS(), llvm::IA64TargetLowering::LowerOperation(), LowerRET(), LowerVECTOR_SHUFFLE(), NormalizeMask(), PerformShuffleCombine(), PromoteSplat(), reachesChainWithoutSideEffects(), RewriteAsNarrowerShuffle(), and SequentialMask().
Definition at line 1432 of file SelectionDAGNodes.h.
References Node.
Referenced by ArgsAreStructReturn(), llvm::TargetLowering::CheckTailCallReturnConstraints(), combineSelectAndUse(), combineShlAddConstant(), CommuteVectorShuffle(), CommuteVectorShuffleMask(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::SPUTargetLowering::computeMaskedBitsForTargetNode(), llvm::SparcTargetLowering::computeMaskedBitsForTargetNode(), llvm::PPCTargetLowering::computeMaskedBitsForTargetNode(), llvm::ARMTargetLowering::computeMaskedBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::SelectionDAGLowering::CopyValueToVirtualRegister(), EltsFromConsecutiveLoads(), llvm::PIC16TargetLowering::ExpandStore(), FindBaseOffset(), getAltivecCompareInfo(), llvm::CallSDNode::getArg(), llvm::CallSDNode::getArgFlagsVal(), llvm::StoreSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::AtomicSDNode::getBasePtr(), llvm::MemSDNode::getBasePtr(), getBuildPairElt(), llvm::CallSDNode::getCallee(), llvm::CallSDNode::getChain(), llvm::MemSDNode::getChain(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOfConsecutiveZeros(), llvm::StoreSDNode::getOffset(), llvm::LoadSDNode::getOffset(), llvm::LSBaseSDNode::getOffset(), llvm::TargetLowering::GetPossiblePreceedingTailCall(), llvm::SelectionDAG::getShuffleScalarElt(), llvm::AtomicSDNode::getVal(), llvm::StoreSDNode::getValue(), getVZextMovL(), InferAlignment(), isAndOrOfSetCCs(), isCalleeLoad(), isFloatingPointZero(), isHighLow(), isMemSrcFromString(), isNegatibleForFree(), IsPossiblyOverwrittenArgumentOfTailCall(), isRMWLoad(), isSetCCEquivalent(), isUndefShuffle(), isVectorLoad(), isVectorShift(), isZeroShuffle(), LookThroughSetCC(), llvm::PIC16TargetLowering::LowerADDC(), llvm::PIC16TargetLowering::LowerADDE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::PIC16TargetLowering::LowerBinOp(), LowerBR_CC(), LowerBuildVectorv16i8(), LowerBuildVectorv8i16(), LowerByteImmed(), LowerCTPOP(), LowerDYNAMIC_STACKALLOC(), LowerEXTRACT_VECTOR_ELT(), LowerFCOPYSIGN(), LowerFORMAL_ARGUMENT(), llvm::PIC16TargetLowering::LowerFORMAL_ARGUMENTS(), LowerFORMAL_ARGUMENTS(), LowerFP_TO_INT(), LowerI64Math(), LowerI8Math(), LowerINSERT_VECTOR_ELT(), LowerINT_TO_FP(), LowerINTRINSIC_WO_CHAIN(), LowerLOAD(), llvm::IA64TargetLowering::LowerOperation(), llvm::AlphaTargetLowering::LowerOperation(), LowerRET(), LowerSCALAR_TO_VECTOR(), LowerSELECT_CC(), LowerSINT_TO_FP(), LowerSTORE(), llvm::PIC16TargetLowering::LowerSUBC(), llvm::PIC16TargetLowering::LowerSUBE(), LowerTRUNCATE(), LowerVASTART(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_4wide(), MatchRotateHalf(), MoveBelowCallSeqStart(), MoveBelowTokenFactor(), NormalizeMask(), llvm::SPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformFMRRDCombine(), PerformSELECTCombine(), PromoteSplat(), reachesChainWithoutSideEffects(), RewriteAsNarrowerShuffle(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImmShift(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), SequentialMask(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifySetCC().
| uint64_t llvm::SDValue::getConstantOperandVal | ( | unsigned | i | ) | const [inline] |
Definition at line 1435 of file SelectionDAGNodes.h.
References Node.
Referenced by llvm::SelectionDAG::getNode(), and InferAlignment().
| bool llvm::SDValue::isTargetOpcode | ( | ) | const [inline] |
| bool llvm::SDValue::isMachineOpcode | ( | ) | const [inline] |
| unsigned llvm::SDValue::getMachineOpcode | ( | ) | const [inline] |
reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.
reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions. In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.
Definition at line 4913 of file SelectionDAG.cpp.
References getNumOperands(), getOpcode(), getOperand(), and llvm::ISD::TokenFactor.
| bool llvm::SDValue::use_empty | ( | ) | const [inline] |
use_empty - Return true if there are no nodes using value ResNo of Node.
Definition at line 1447 of file SelectionDAGNodes.h.
References Node.
| bool llvm::SDValue::hasOneUse | ( | ) | const [inline] |
hasOneUse - Return true if there is exactly one node using value ResNo of Node.
Definition at line 1450 of file SelectionDAGNodes.h.
References Node.
Referenced by CanonicalizeMovddup(), GetNegatedExpression(), isAndOrOfSetCCs(), isCalleeLoad(), isNegatibleForFree(), isRMWLoad(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformSTORECombine(), and TranslateX86CC().
The documentation for this class was generated from the following files:
1.5.6