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llvm::AlphaInstrInfo Class Reference

#include <AlphaInstrInfo.h>

Inheritance diagram for llvm::AlphaInstrInfo:

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Collaboration diagram for llvm::AlphaInstrInfo:

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List of all members.

Public Member Functions

 AlphaInstrInfo ()
virtual const AlphaRegisterInfo & getRegisterInfo () const
virtual bool isMoveInstr (const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg) const
virtual unsigned isLoadFromStackSlot (MachineInstr *MI, int &FrameIndex) const
virtual unsigned isStoreToStackSlot (MachineInstr *MI, int &FrameIndex) const
virtual unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond) const
virtual void copyRegToReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const
 copyRegToReg - Add a copy between a pair of registers
virtual void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC) const
virtual void storeRegToAddr (MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, SmallVectorImpl< MachineInstr * > &NewMIs) const
virtual void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC) const
virtual void loadRegFromAddr (MachineFunction &MF, unsigned DestReg, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, SmallVectorImpl< MachineInstr * > &NewMIs) const
virtual MachineInstr * foldMemoryOperand (MachineFunction &MF, MachineInstr *MI, SmallVectorImpl< unsigned > &Ops, int FrameIndex) const
virtual MachineInstr * foldMemoryOperand (MachineFunction &MF, MachineInstr *MI, SmallVectorImpl< unsigned > &Ops, MachineInstr *LoadMI) const
bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond) const
unsigned RemoveBranch (MachineBasicBlock &MBB) const
void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
bool BlockHasNoFallThrough (MachineBasicBlock &MBB) const
bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const

Constructor & Destructor Documentation

AlphaInstrInfo::AlphaInstrInfo (   ) 
 

Definition at line 21 of file AlphaInstrInfo.cpp.

References llvm::array_lengthof().

Member Function Documentation

bool AlphaInstrInfo::AnalyzeBranch (  MachineBasicBlock &  MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond
)  const [virtual]
 

AnalyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:

1. If this block ends with no branches (it just falls through to its succ) just return false, leaving TBB/FBB null. 2. If this block ends with only an unconditional branch, it sets TBB to be the destination block. 3. If this block ends with an conditional branch and it falls through to an successor block, it sets TBB to be the branch destination block and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches. 4. If this block ends with an conditional branch and an unconditional block, it returns the 'true' destination in TBB, the 'false' destination in FBB, and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.

Note that RemoveBranch and InsertBranch must be implemented to support cases where this method returns success.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 317 of file AlphaInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::TargetInstrInfo::isUnpredicatedTerminator(), and llvm::SmallVectorImpl< T >::push_back().

bool AlphaInstrInfo::BlockHasNoFallThrough (  MachineBasicBlock &  MBB  )  const [virtual]
 

BlockHasNoFallThrough - Return true if the specified block does not fall-through into its successor block. This is primarily used when a branch is unanalyzable. It is useful for things like unconditional indirect branches (jump tables).

Reimplemented from llvm::TargetInstrInfo.

Definition at line 409 of file AlphaInstrInfo.cpp.

References llvm::MachineBasicBlock::back(), llvm::MachineBasicBlock::empty(), and llvm::MachineInstr::getOpcode().

void AlphaInstrInfo::copyRegToReg (  MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI,
unsigned  DestReg,
unsigned  SrcReg,
const TargetRegisterClass *  DestRC,
const TargetRegisterClass *  SrcRC
)  const [virtual]
 

copyRegToReg - Add a copy between a pair of registers

Reimplemented from llvm::TargetInstrInfo.

Definition at line 136 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::TargetInstrInfo::get().

virtual MachineInstr* llvm::AlphaInstrInfo::foldMemoryOperand (  MachineFunction &  MF,
MachineInstr *  MI,
SmallVectorImpl< unsigned > &  Ops,
MachineInstr *  LoadMI
)  const [inline, virtual]
 

foldMemoryOperand - Same as the previous version except it allows folding of any load and store from / to any address, not just from a specific stack slot.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 75 of file AlphaInstrInfo.h.

MachineInstr * AlphaInstrInfo::foldMemoryOperand (  MachineFunction &  MF,
MachineInstr *  MI,
SmallVectorImpl< unsigned > &  Ops,
int  FrameIndex
)  const [virtual]
 

foldMemoryOperand - Attempt to fold a load or store of the specified stack slot into the specified machine instruction for the specified operand(s). If this is possible, a new instruction is returned with the specified operand folded, otherwise NULL is returned. The client is responsible for removing the old instruction and adding the new one in the instruction stream.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 254 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetInstrInfo::get(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), and llvm::SmallVectorImpl< T >::size().

virtual const AlphaRegisterInfo& llvm::AlphaInstrInfo::getRegisterInfo (   )  const [inline, virtual]
 

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 31 of file AlphaInstrInfo.h.

unsigned AlphaInstrInfo::InsertBranch (  MachineBasicBlock &  MBB,
MachineBasicBlock *  TBB,
MachineBasicBlock *  FBB,
const SmallVectorImpl< MachineOperand > &  Cond
)  const [virtual]
 

InsertBranch - Insert a branch into the end of the specified MachineBasicBlock. This operands to this method are the same as those returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch returns success and when an unconditional branch (TBB is non-null, FBB is null, Cond is empty) needs to be inserted. It returns the number of instructions inserted.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 103 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::SmallVectorImpl< T >::empty(), llvm::TargetInstrInfo::get(), isAlphaIntCondCode(), and llvm::SmallVectorImpl< T >::size().

void AlphaInstrInfo::insertNoop (  MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI
)  const [virtual]
 

insertNoop - Insert a noop into the instruction stream at the specified point.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 403 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::TargetInstrInfo::get().

unsigned AlphaInstrInfo::isLoadFromStackSlot (  MachineInstr *  MI,
int &  FrameIndex
)  const [virtual]
 

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 52 of file AlphaInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::isFrameIndex().

bool AlphaInstrInfo::isMoveInstr (  const MachineInstr &  MI,
unsigned &  SrcReg,
unsigned &  DstReg
)  const [virtual]
 

Return true if the instruction is a register to register move and leave the source and dest operands in the passed parameters.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 26 of file AlphaInstrInfo.cpp.

References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::isRegister().

unsigned AlphaInstrInfo::isStoreToStackSlot (  MachineInstr *  MI,
int &  FrameIndex
)  const [virtual]
 

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 70 of file AlphaInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::isFrameIndex().

void AlphaInstrInfo::loadRegFromAddr (  MachineFunction &  MF,
unsigned  DestReg,
SmallVectorImpl< MachineOperand > &  Addr,
const TargetRegisterClass *  RC,
SmallVectorImpl< MachineInstr * > &  NewMIs
)  const [virtual]
 

Reimplemented from llvm::TargetInstrInfo.

Definition at line 229 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetInstrInfo::get(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isRegister(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().

void AlphaInstrInfo::loadRegFromStackSlot (  MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass *  RC
)  const [virtual]
 

Reimplemented from llvm::TargetInstrInfo.

Definition at line 210 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::TargetInstrInfo::get().

unsigned AlphaInstrInfo::RemoveBranch (  MachineBasicBlock &  MBB  )  const [virtual]
 

RemoveBranch - Remove the branching code at the end of the specific MBB. this is only invoked in cases where AnalyzeBranch returns success. It returns the number of instructions that were removed.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 378 of file AlphaInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), and llvm::MachineBasicBlock::end().

bool AlphaInstrInfo::ReverseBranchCondition (  SmallVectorImpl< MachineOperand > &  Cond  )  const [virtual]
 

ReverseBranchCondition - Reverses the branch condition of the specified condition list, returning false on success and true if it cannot be reversed.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 422 of file AlphaInstrInfo.cpp.

References AlphaRevCondCode(), and llvm::SmallVectorImpl< T >::size().

void AlphaInstrInfo::storeRegToAddr (  MachineFunction &  MF,
unsigned  SrcReg,
bool  isKill,
SmallVectorImpl< MachineOperand > &  Addr,
const TargetRegisterClass *  RC,
SmallVectorImpl< MachineInstr * > &  NewMIs
)  const [virtual]
 

Reimplemented from llvm::TargetInstrInfo.

Definition at line 183 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetInstrInfo::get(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isRegister(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().

void AlphaInstrInfo::storeRegToStackSlot (  MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass *  RC
)  const [virtual]
 

Reimplemented from llvm::TargetInstrInfo.

Definition at line 160 of file AlphaInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::TargetInstrInfo::get().

The documentation for this class was generated from the following files:

Generated on Thu Aug 21 02:57:39 2008 for LLVM by Doxygen1.3.9.1
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