LLVM API Documentation
00001 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file defines the TargetMachine and LLVMTargetMachine classes. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_TARGET_TARGETMACHINE_H 00015 #define LLVM_TARGET_TARGETMACHINE_H 00016 00017 #include "llvm/Target/TargetInstrItineraries.h" 00018 #include <cassert> 00019 00020 namespace llvm { 00021 00022 class TargetAsmInfo; 00023 class TargetData; 00024 class TargetSubtarget; 00025 class TargetInstrInfo; 00026 class TargetJITInfo; 00027 class TargetLowering; 00028 class TargetFrameInfo; 00029 class MachineCodeEmitter; 00030 class TargetRegisterInfo; 00031 class Module; 00032 class PassManagerBase; 00033 class PassManager; 00034 class Pass; 00035 class TargetMachOWriterInfo; 00036 class TargetELFWriterInfo; 00037 class raw_ostream; 00038 00039 // Relocation model types. 00040 namespace Reloc { 00041 enum Model { 00042 Default, 00043 Static, 00044 PIC_, // Cannot be named PIC due to collision with -DPIC 00045 DynamicNoPIC 00046 }; 00047 } 00048 00049 // Code model types. 00050 namespace CodeModel { 00051 enum Model { 00052 Default, 00053 Small, 00054 Kernel, 00055 Medium, 00056 Large 00057 }; 00058 } 00059 00060 namespace FileModel { 00061 enum Model { 00062 Error, 00063 None, 00064 AsmFile, 00065 MachOFile, 00066 ElfFile 00067 }; 00068 } 00069 00070 //===----------------------------------------------------------------------===// 00071 /// 00072 /// TargetMachine - Primary interface to the complete machine description for 00073 /// the target machine. All target-specific information should be accessible 00074 /// through this interface. 00075 /// 00076 class TargetMachine { 00077 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 00078 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 00079 protected: // Can only create subclasses. 00080 TargetMachine() : AsmInfo(0) { } 00081 00082 /// getSubtargetImpl - virtual method implemented by subclasses that returns 00083 /// a reference to that target's TargetSubtarget-derived member variable. 00084 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 00085 00086 /// AsmInfo - Contains target specific asm information. 00087 /// 00088 mutable const TargetAsmInfo *AsmInfo; 00089 00090 /// createTargetAsmInfo - Create a new instance of target specific asm 00091 /// information. 00092 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 00093 00094 public: 00095 virtual ~TargetMachine(); 00096 00097 /// getModuleMatchQuality - This static method should be implemented by 00098 /// targets to indicate how closely they match the specified module. This is 00099 /// used by the LLC tool to determine which target to use when an explicit 00100 /// -march option is not specified. If a target returns zero, it will never 00101 /// be chosen without an explicit -march option. 00102 static unsigned getModuleMatchQuality(const Module &) { return 0; } 00103 00104 /// getJITMatchQuality - This static method should be implemented by targets 00105 /// that provide JIT capabilities to indicate how suitable they are for 00106 /// execution on the current host. If a value of 0 is returned, the target 00107 /// will not be used unless an explicit -march option is used. 00108 static unsigned getJITMatchQuality() { return 0; } 00109 00110 // Interfaces to the major aspects of target machine information: 00111 // -- Instruction opcode and operand information 00112 // -- Pipelines and scheduling information 00113 // -- Stack frame information 00114 // -- Selection DAG lowering information 00115 // 00116 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 00117 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 00118 virtual TargetLowering *getTargetLowering() const { return 0; } 00119 virtual const TargetData *getTargetData() const { return 0; } 00120 00121 00122 /// getTargetAsmInfo - Return target specific asm information. 00123 /// 00124 const TargetAsmInfo *getTargetAsmInfo() const { 00125 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 00126 return AsmInfo; 00127 } 00128 00129 /// getSubtarget - This method returns a pointer to the specified type of 00130 /// TargetSubtarget. In debug builds, it verifies that the object being 00131 /// returned is of the correct type. 00132 template<typename STC> const STC &getSubtarget() const { 00133 const TargetSubtarget *TST = getSubtargetImpl(); 00134 assert(TST && dynamic_cast<const STC*>(TST) && 00135 "Not the right kind of subtarget!"); 00136 return *static_cast<const STC*>(TST); 00137 } 00138 00139 /// getRegisterInfo - If register information is available, return it. If 00140 /// not, return null. This is kept separate from RegInfo until RegInfo has 00141 /// details of graph coloring register allocation removed from it. 00142 /// 00143 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 00144 00145 /// getJITInfo - If this target supports a JIT, return information for it, 00146 /// otherwise return null. 00147 /// 00148 virtual TargetJITInfo *getJITInfo() { return 0; } 00149 00150 /// getInstrItineraryData - Returns instruction itinerary data for the target 00151 /// or specific subtarget. 00152 /// 00153 virtual const InstrItineraryData getInstrItineraryData() const { 00154 return InstrItineraryData(); 00155 } 00156 00157 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 00158 /// information for it, otherwise return null. 00159 /// 00160 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 00161 00162 /// getELFWriterInfo - If this target supports an ELF writer, return 00163 /// information for it, otherwise return null. 00164 /// 00165 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 00166 00167 /// getRelocationModel - Returns the code generation relocation model. The 00168 /// choices are static, PIC, and dynamic-no-pic, and target default. 00169 static Reloc::Model getRelocationModel(); 00170 00171 /// setRelocationModel - Sets the code generation relocation model. 00172 static void setRelocationModel(Reloc::Model Model); 00173 00174 /// getCodeModel - Returns the code model. The choices are small, kernel, 00175 /// medium, large, and target default. 00176 static CodeModel::Model getCodeModel(); 00177 00178 /// setCodeModel - Sets the code model. 00179 static void setCodeModel(CodeModel::Model Model); 00180 00181 /// CodeGenFileType - These enums are meant to be passed into 00182 /// addPassesToEmitFile to indicate what type of file to emit. 00183 enum CodeGenFileType { 00184 AssemblyFile, ObjectFile, DynamicLibrary 00185 }; 00186 00187 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 00188 /// on this target. User flag overrides. 00189 virtual bool getEnableTailMergeDefault() const { return true; } 00190 00191 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 00192 /// specified file emitted. Typically this will involve several steps of code 00193 /// generation. If Fast is set to true, the code generator should emit code 00194 /// as fast as possible, though the generated code may be less efficient. 00195 /// This method should return FileModel::Error if emission of this file type 00196 /// is not supported. 00197 /// 00198 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 00199 raw_ostream &, 00200 CodeGenFileType, 00201 bool /*Fast*/) { 00202 return FileModel::None; 00203 } 00204 00205 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 00206 /// to be split up (e.g., to add an object writer pass), this method can be 00207 /// used to finish up adding passes to emit the file, if necessary. 00208 /// 00209 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 00210 MachineCodeEmitter *, bool /*Fast*/) { 00211 return true; 00212 } 00213 00214 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 00215 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 00216 /// actually outputting the machine code and resolving things like the address 00217 /// of functions. This method returns true if machine code emission is 00218 /// not supported. 00219 /// 00220 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 00221 MachineCodeEmitter &, 00222 bool /*Fast*/) { 00223 return true; 00224 } 00225 00226 /// addPassesToEmitWholeFile - This method can be implemented by targets that 00227 /// require having the entire module at once. This is not recommended, do not 00228 /// use this. 00229 virtual bool WantsWholeFile() const { return false; } 00230 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &, 00231 CodeGenFileType, bool /*Fast*/) { 00232 return true; 00233 } 00234 }; 00235 00236 /// LLVMTargetMachine - This class describes a target machine that is 00237 /// implemented with the LLVM target-independent code generator. 00238 /// 00239 class LLVMTargetMachine : public TargetMachine { 00240 protected: // Can only create subclasses. 00241 LLVMTargetMachine() { } 00242 00243 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 00244 /// both emitting to assembly files or machine code output. 00245 /// 00246 bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/); 00247 00248 public: 00249 00250 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 00251 /// specified file emitted. Typically this will involve several steps of code 00252 /// generation. If Fast is set to true, the code generator should emit code 00253 /// as fast as possible, though the generated code may be less efficient. 00254 /// This method should return FileModel::Error if emission of this file type 00255 /// is not supported. 00256 /// 00257 /// The default implementation of this method adds components from the 00258 /// LLVM retargetable code generator, invoking the methods below to get 00259 /// target-specific passes in standard locations. 00260 /// 00261 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 00262 raw_ostream &Out, 00263 CodeGenFileType FileType, 00264 bool Fast); 00265 00266 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 00267 /// to be split up (e.g., to add an object writer pass), this method can be 00268 /// used to finish up adding passes to emit the file, if necessary. 00269 /// 00270 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 00271 MachineCodeEmitter *MCE, bool Fast); 00272 00273 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 00274 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 00275 /// actually outputting the machine code and resolving things like the address 00276 /// of functions. This method returns true if machine code emission is 00277 /// not supported. 00278 /// 00279 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 00280 MachineCodeEmitter &MCE, bool Fast); 00281 00282 /// Target-Independent Code Generator Pass Configuration Options. 00283 00284 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 00285 /// passes, then install an instruction selector pass, which converts from 00286 /// LLVM code to machine instructions. 00287 virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) { 00288 return true; 00289 } 00290 00291 /// addPreRegAllocPasses - This method may be implemented by targets that want 00292 /// to run passes immediately before register allocation. This should return 00293 /// true if -print-machineinstrs should print after these passes. 00294 virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) { 00295 return false; 00296 } 00297 00298 /// addPostRegAllocPasses - This method may be implemented by targets that 00299 /// want to run passes after register allocation but before prolog-epilog 00300 /// insertion. This should return true if -print-machineinstrs should print 00301 /// after these passes. 00302 virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) { 00303 return false; 00304 } 00305 00306 /// addPreEmitPass - This pass may be implemented by targets that want to run 00307 /// passes immediately before machine code is emitted. This should return 00308 /// true if -print-machineinstrs should print out the code after the passes. 00309 virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) { 00310 return false; 00311 } 00312 00313 00314 /// addAssemblyEmitter - This pass should be overridden by the target to add 00315 /// the asmprinter, if asm emission is supported. If this is not supported, 00316 /// 'true' should be returned. 00317 virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/, 00318 raw_ostream &) { 00319 return true; 00320 } 00321 00322 /// addCodeEmitter - This pass should be overridden by the target to add a 00323 /// code emitter, if supported. If this is not supported, 'true' should be 00324 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 00325 virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/, 00326 bool /*DumpAsm*/, MachineCodeEmitter &) { 00327 return true; 00328 } 00329 00330 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 00331 /// a code emitter (without setting flags), if supported. If this is not 00332 /// supported, 'true' should be returned. If DumpAsm is true, the generated 00333 /// assembly is printed to cerr. 00334 virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/, 00335 bool /*DumpAsm*/, MachineCodeEmitter &) { 00336 return true; 00337 } 00338 00339 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 00340 /// on this target. User flag overrides. 00341 virtual bool getEnableTailMergeDefault() const { return true; } 00342 }; 00343 00344 } // End llvm namespace 00345 00346 #endif
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