LLVM API Documentation
#include "llvm/CodeGen/ScheduleDAGSDNodes.h"#include "llvm/CodeGen/MachineConstantPool.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/Target/TargetData.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Target/TargetInstrInfo.h"#include "llvm/Target/TargetLowering.h"#include "llvm/ADT/Statistic.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/MathExtras.h"

Go to the source code of this file.
Defines | |
| #define | DEBUG_TYPE "pre-RA-sched" |
Functions | |
| static const TargetRegisterClass * | getInstrOperandRegClass (const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, const TargetInstrDesc &II, unsigned Op) |
| static const TargetRegisterClass * | getSubRegisterRegClass (const TargetRegisterClass *TRC, unsigned SubIdx) |
| static const TargetRegisterClass * | getSuperRegisterRegClass (const TargetRegisterClass *TRC, unsigned SubIdx, MVT VT) |
| #define DEBUG_TYPE "pre-RA-sched" |
Definition at line 15 of file ScheduleDAGSDNodesEmit.cpp.
| static const TargetRegisterClass* getInstrOperandRegClass | ( | const TargetRegisterInfo * | TRI, | |
| const TargetInstrInfo * | TII, | |||
| const TargetInstrDesc & | II, | |||
| unsigned | Op | |||
| ) | [static] |
getInstrOperandRegClass - Return register class of the operand of an instruction of the specified TargetInstrDesc.
Definition at line 34 of file ScheduleDAGSDNodesEmit.cpp.
References llvm::TargetInstrDesc::getNumOperands(), llvm::TargetInstrInfo::getPointerRegClass(), llvm::TargetRegisterInfo::getRegClass(), llvm::TargetOperandInfo::isLookupPtrRegClass(), llvm::TargetInstrDesc::isVariadic(), llvm::TargetInstrDesc::OpInfo, and llvm::TargetOperandInfo::RegClass.
| static const TargetRegisterClass* getSubRegisterRegClass | ( | const TargetRegisterClass * | TRC, | |
| unsigned | SubIdx | |||
| ) | [static] |
getSubRegisterRegClass - Returns the register class of specified register class' "SubIdx"'th sub-register class.
Definition at line 332 of file ScheduleDAGSDNodesEmit.cpp.
References llvm::TargetRegisterClass::subregclasses_begin().
Referenced by getSuperRegisterRegClass().
| static const TargetRegisterClass* getSuperRegisterRegClass | ( | const TargetRegisterClass * | TRC, | |
| unsigned | SubIdx, | |||
| MVT | VT | |||
| ) | [static] |
getSuperRegisterRegClass - Returns the register class of a superreg A whose "SubIdx"'th sub-register class is the specified register class and whose type matches the specified type.
Definition at line 345 of file ScheduleDAGSDNodesEmit.cpp.
References E, getSubRegisterRegClass(), llvm::TargetRegisterClass::superregclasses_begin(), and llvm::TargetRegisterClass::superregclasses_end().
This web site is hosted by the Computer Science Department at the University of Illinois at Urbana-Champaign.