LLVM API Documentation

ARMRegisterInfo.cpp File Reference

#include "ARM.h"
#include "ARMAddressingModes.h"
#include "ARMInstrInfo.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMRegisterInfo.h"
#include "ARMSubtarget.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/CommandLine.h"
#include <algorithm>
#include "ARMGenRegisterInfo.inc"

Include dependency graph for ARMRegisterInfo.cpp:

Go to the source code of this file.

Functions

static const MachineInstrBuilderAddDefaultPred (const MachineInstrBuilder &MIB)
static const MachineInstrBuilderAddDefaultCC (const MachineInstrBuilder &MIB)
static void emitARMRegPlusImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo &TII)
static unsigned calcNumMI (int Opc, int ExtraOpc, unsigned Bytes, unsigned NumBits, unsigned Scale)
static void emitThumbRegPlusImmInReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMRegisterInfo &MRI)
static void emitThumbRegPlusImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMRegisterInfo &MRI)
static void emitSPUpdate (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, bool isThumb, const TargetInstrInfo &TII, const ARMRegisterInfo &MRI)
static void emitThumbConstant (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, int Imm, const TargetInstrInfo &TII, const ARMRegisterInfo &MRI)
static unsigned findScratchRegister (RegScavenger *RS, const TargetRegisterClass *RC, ARMFunctionInfo *AFI)
static unsigned estimateStackSize (MachineFunction &MF, MachineFrameInfo *MFI)
static void movePastCSLoadStoreOps (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Opc, unsigned Area, const ARMSubtarget &STI)
static bool isCalleeSavedRegister (unsigned Reg, const unsigned *CSRegs)
static bool isCSRestore (MachineInstr *MI, const unsigned *CSRegs)

Variables

static cl::opt< bool > ThumbRegScavenging ("enable-thumb-reg-scavenging", cl::Hidden, cl::desc("Enable register scavenging on Thumb"))


Function Documentation

static const MachineInstrBuilder& AddDefaultCC ( const MachineInstrBuilder MIB  )  [inline, static]

Definition at line 171 of file ARMRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addReg().

static const MachineInstrBuilder& AddDefaultPred ( const MachineInstrBuilder MIB  )  [inline, static]

static unsigned calcNumMI ( int  Opc,
int  ExtraOpc,
unsigned  Bytes,
unsigned  NumBits,
unsigned  Scale 
) [static]

calcNumMI - Returns the number of instructions required to materialize the specific add / sub r, c instruction.

Definition at line 346 of file ARMRegisterInfo.cpp.

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), and emitThumbRegPlusImmediate().

static void emitARMRegPlusImmediate ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
unsigned  DestReg,
unsigned  BaseReg,
int  NumBytes,
ARMCC::CondCodes  Pred,
unsigned  PredReg,
const TargetInstrInfo TII 
) [static]

emitARMRegPlusImmediate - Emits a series of instructions to materialize a destreg = basereg + immediate in ARM code.

Definition at line 316 of file ARMRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetInstrInfo::get(), llvm::ARM_AM::getSOImmVal(), llvm::ARM_AM::getSOImmValRotate(), and llvm::ARM_AM::rotr32().

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), and emitSPUpdate().

static void emitSPUpdate ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
int  NumBytes,
ARMCC::CondCodes  Pred,
unsigned  PredReg,
bool  isThumb,
const TargetInstrInfo TII,
const ARMRegisterInfo MRI 
) [static]

static void emitThumbConstant ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
unsigned  DestReg,
int  Imm,
const TargetInstrInfo TII,
const ARMRegisterInfo MRI 
) [static]

emitThumbConstant - Emit a series of instructions to materialize a constant.

Definition at line 575 of file ARMRegisterInfo.cpp.

References llvm::BuildMI(), emitThumbRegPlusImmediate(), and llvm::TargetInstrInfo::get().

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex().

static void emitThumbRegPlusImmediate ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
unsigned  DestReg,
unsigned  BaseReg,
int  NumBytes,
const TargetInstrInfo TII,
const ARMRegisterInfo MRI 
) [static]

emitThumbRegPlusImmediate - Emits a series of instructions to materialize a destreg = basereg + immediate in Thumb code.

Definition at line 422 of file ARMRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), calcNumMI(), emitThumbRegPlusImmInReg(), llvm::TargetInstrInfo::get(), llvm::ARMRegisterInfo::isLowRegister(), Scale, and Threshold.

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), llvm::ARMRegisterInfo::emitEpilogue(), emitSPUpdate(), and emitThumbConstant().

static void emitThumbRegPlusImmInReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
unsigned  DestReg,
unsigned  BaseReg,
int  NumBytes,
bool  CanChangeCC,
const TargetInstrInfo TII,
const ARMRegisterInfo MRI 
) [static]

emitThumbRegPlusImmInReg - Emits a series of instructions to materialize a destreg = basereg + immediate in Thumb code. Materialize the immediate in a register using mov / mvn sequences or load the immediate from a constpool entry.

Definition at line 373 of file ARMRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::ARMCC::AL, llvm::BuildMI(), llvm::ARMRegisterInfo::emitLoadConstPool(), llvm::TargetInstrInfo::get(), and llvm::ARMRegisterInfo::isLowRegister().

Referenced by llvm::ARMRegisterInfo::eliminateFrameIndex(), and emitThumbRegPlusImmediate().

static unsigned estimateStackSize ( MachineFunction MF,
MachineFrameInfo MFI 
) [static]

static unsigned findScratchRegister ( RegScavenger RS,
const TargetRegisterClass RC,
ARMFunctionInfo AFI 
) [static]

findScratchRegister - Find a 'free' ARM register. If register scavenger is not being used, R12 is available. Otherwise, try for a call-clobbered register first and then a spilled callee-saved register if that fails.

Definition at line 598 of file ARMRegisterInfo.cpp.

References llvm::RegScavenger::FindUnusedReg(), llvm::ARMFunctionInfo::getSpilledCSRegisters(), and Reg.

Referenced by llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::lowerCRSpilling(), and llvm::PPCRegisterInfo::lowerDynamicAlloc().

static bool isCalleeSavedRegister ( unsigned  Reg,
const unsigned CSRegs 
) [static]

Definition at line 1316 of file ARMRegisterInfo.cpp.

Referenced by isCSRestore().

static bool isCSRestore ( MachineInstr MI,
const unsigned CSRegs 
) [static]

static void movePastCSLoadStoreOps ( MachineBasicBlock MBB,
MachineBasicBlock::iterator &  MBBI,
int  Opc,
unsigned  Area,
const ARMSubtarget STI 
) [static]

Move iterator pass the next bunch of callee save load / store ops for the particular spill area (1: integer area 1, 2: integer area 2, 3: fp area, 0: don't care).

Definition at line 1158 of file ARMRegisterInfo.cpp.

References llvm::X86II::D8, llvm::X86II::D9, llvm::MachineBasicBlock::end(), and llvm::ARMSubtarget::isTargetDarwin().

Referenced by llvm::ARMRegisterInfo::emitEpilogue(), and llvm::ARMRegisterInfo::emitPrologue().


Variable Documentation

cl::opt<bool> ThumbRegScavenging("enable-thumb-reg-scavenging", cl::Hidden, cl::desc("Enable register scavenging on Thumb")) [static]




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